# US 2025/0096933 A1 · Erasure style ldpc rate matching for tb over multiple slots > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2025/0096933 A1 - Document ID: US20250096933A1 - Status: Published application - Kind: A1 - Application number: 18/967,523 - Filed: 2024-12-03 - Published: 2025-03-20 - Earliest claimed: 2021-05-24 - Assignees: QUALCOMM Incorporated - Applicants: QUALCOMM Incorporated - Inventors: Sanghoon KIM; Alexei Yurievitch GOROKHOV; Hari SANKAR - Web page: https://patentgrep.com/patent/US20250096933A1 ## CPC - H04L 1/0067: {Rate matching (H04L1/0013 and H04L1/08 take precedence)} - H04L 1/0068: {by puncturing} - H04L 5/0053: {Allocation of signalling, i.e. of overhead other than pilot signals} - H04L 5/0055: {Physical resource allocation for ACK/NACK (for physical mapping arrangements in ARQ protocols H04L1/1861)} - H04L 5/0058: {Allocation criteria} - H04W 72/0446: Resources in time domain, e.g. slots or frames - H04W 72/21: in the uplink direction of a wireless link, i.e. towards the network - H04L 1/0057: {Block codes (H04L1/0061, H04L1/0064 take precedence)} - H04L 1/12: by using return channel - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) - H04W: WIRELESS COMMUNICATION NETWORKS (broadcast communication H04H; communication systems using wireless links for non-selective communication, e.g. wireless extensions H04M1/72) ## Abstract Methods, apparatuses, and computer-readable storage medium for rate matching for TBoMS are provided. An example method includes calculating a slot length for each UL slot of a plurality of UL slots, the slot length for each UL slot being associated with a plurality of rate matching output bits, each UL slot including a starting point for the plurality of rate matching output bits, the slot length for each UL slot being associated with a starting boundary, the plurality of UL slots being associated with at least one of a single TB or a single rate matching. The example method may include allocating one or more bits of the plurality of rate matching output bits for a modulation process. The example method may include refraining allocating at least one bit of the plurality of rate matching output bits for the modulation process, the at least one bit corresponding to UCI multiplexing. ## Claims ### Claim 1 An apparatus for wireless communication at a user equipment (UE), comprising: one or more memories; and at least one processor coupled to the one or more memories, the one or more memories storing instructions configurable to be executable by the at least one processor to cause the apparatus to: calculate a slot length for each uplink (UL) slot of a plurality of UL slots, the slot length for each UL slot being associated with a plurality of rate matching output bits, each UL slot including a starting point for the plurality of rate matching output bits, the slot length for each UL slot being associated with a starting boundary, the plurality of UL slots being associated with at least one of a single transport block (TB) or a single rate matching; allocate one or more bits of the plurality of rate matching output bits for a modulation process; write physical uplink shared channel (PUSCH) data in at least one bit of the plurality of rate matching output bits, the at least one bit corresponding to uplink control information (UCI) multiplexing; and overwrite the PUSCH data with UCI multiplexing data in the at least one bit. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the plurality of rate matching output bits corresponds to a rate matching output size. ### Claim 3 (depends on 1) The apparatus of claim 1, wherein the single TB corresponds to a TB over multiple slots (TBoMS). ### Claim 4 (depends on 1) The apparatus of claim 1, wherein the instructions configurable to be executed are further executable by the at least one processor to cause the UE to: store the starting boundary associated with each UL slot; wherein the at least one bit of the plurality of rate matching output bits corresponds to an end of one or more slots of the plurality of UL slots. ### Claim 5 (depends on 1) The apparatus of claim 1, wherein the instructions configurable to be executed are further executable by the at least one processor to cause the UE to: determine one or more UCI bits to be multiplexed, the one or more UCI bits not corresponding with the UCI multiplexing; and calculate and store the starting boundary associated with each UL slot based on the one or more UCI bits; wherein the at least one bit of the plurality of rate matching output bits corresponds to an end of one or more slots of the plurality of UL slots. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein the instructions configurable to be executed are further executable by the at least one processor to cause the UE to: wherein the slot length is calculated without storing the starting boundary associated with each UL slot; wherein the at least one bit of the plurality of rate matching output bits corresponds to an end of the plurality of UL slots. ### Claim 7 (depends on 1) The apparatus of claim 1, wherein the instructions configurable to be executed are further executable by the at least one processor to cause the UE to: determine one or more UCI bits to be multiplexed, the one or more UCI bits not corresponding with the UCI multiplexing; and wherein the slot length is calculated without storing the starting boundary associated with each UL slot based on the one or more UCI bits; wherein the at least one bit of the plurality of rate matching output bits corresponds to an end of the plurality of UL slots. ### Claim 8 (depends on 1) The apparatus of claim 1, wherein the instructions configurable to be executed are further executable by the at least one processor to cause the UE to: receive, from a base station, an indication of a physical uplink shared channel (PUSCH) configuration, wherein the PUSCH configuration is associated with the allocation of the one or more bits and the at least one bit. ### Claim 9 (depends on 1) The apparatus of claim 1, wherein each of the one or more bits is allocated for the modulation process in one or more resource elements (REs). ### Claim 10 (depends on 1) The apparatus of claim 1, wherein the instructions configurable to be executed are further executable by the at least one processor to cause the UE to: determine whether the at least one bit of the plurality of rate matching output bits corresponds to UCI multiplexing. ### Claim 11 (depends on 1) The apparatus of claim 1, wherein the at least one bit of the plurality of rate matching output bits corresponds to at least one unused physical uplink shared channel (PUSCH) bit. ### Claim 12 (depends on 11) The apparatus of claim 11, wherein the UCI multiplexing is associated with one or more physical uplink control channel (PUCCH) acknowledgment or non-acknowledgment bits. ### Claim 13 (depends on 1) The apparatus of claim 1, wherein the instructions configurable to be executed are further executable by the at least one processor to cause the UE to: calculate a first starting boundary for at least one subsequent slot of the plurality of UL slots based on the at least one bit of the plurality of rate matching output bits. ### Claim 14 (depends on 13) The apparatus of claim 13, wherein the starting boundary for the at least one subsequent slot is calculated without accounting for UCI multiplexing. ### Claim 15 (depends on 13) The apparatus of claim 13, wherein the calculation of the starting boundary for the at least one subsequent slot is pre-calculated or predetermined. ### Claim 16 (depends on 1) The apparatus of claim 1, wherein the instructions configurable to be executed are further executable by the at least one processor to cause the UE to: transmit, to a base station, an UL transmission based on the allocated one or more bits and the at least one bit. ### Claim 17 (depends on 1) The apparatus of claim 1, further comprising a transceiver coupled to the at least one processor. ### Claim 18 An apparatus for wireless communication at a network entity, comprising: one or more memories; and at least one processor coupled to the one or more memories, the one or more memories storing instructions configurable to be executable by the at least one processor to cause the apparatus to: transmit an indication of a physical uplink shared channel (PUSCH) configuration for a user equipment (UE), the PUSCH configuration being associated with an allocation of a plurality of rate matching output bits for a modulation process, a slot length for each UL slot of a plurality of UL slots being associated with the plurality of rate matching output bits, each UL slot including a starting point for the plurality of rate matching output bits, the slot length for each UL slot being associated with a starting boundary, the plurality of UL slots being associated with at least one of a single transport block (TB) or a single rate matching; and receive an UL transmission based on an allocation of one or more bits of the plurality of rate matching output bits and on at least one bit of the plurality of rate matching output bits that is associated with uplink control information (UCI) multiplexing wherein PUSCH data in the at least one bit is overwritten with UCI multiplexing data. ### Claim 19 (depends on 18) The apparatus of claim 18, wherein the plurality of rate matching output bits corresponds to a rate matching output size. ### Claim 20 (depends on 18) The apparatus of claim 18, wherein the single TB corresponds to a TB over multiple slots (TBoMS). ### Claim 21 (depends on 18) The apparatus of claim 18, wherein each of the one or more bits is allocated for the modulation process in one or more resource elements (REs). ### Claim 22 (depends on 18) The apparatus of claim 18, wherein the UCI multiplexing is associated with one or more physical uplink control channel (PUCCH) acknowledgment or non-acknowledgment bits. ### Claim 23 (depends on 18) The apparatus of claim 18, wherein the starting boundary for at least one subsequent slot of the plurality of UL slots is calculated without accounting for UCI multiplexing and based on the at least one bit that is skipped being allocated for the modulation process. ### Claim 24 (depends on 18) The apparatus of claim 18, further comprising an antenna or a transceiver coupled to the at least one processor. ### Claim 25 A method of wireless communication at a user equipment (UE), comprising: calculating a slot length for each uplink (UL) slot of a plurality of UL slots, the slot length for each UL slot being associated with a plurality of rate matching output bits, each UL slot including a starting point for the plurality of rate matching output bits, the slot length for each UL slot being associated with a starting boundary, the plurality of UL slots being associated with at least one of a single transport block (TB) or a single rate matching; allocating one or more bits of the plurality of rate matching output bits for a modulation process; writing physical uplink shared channel (PUSCH) data in at least one bit of the plurality of rate matching output bits, the at least one bit corresponding to uplink control information (UCI) multiplexing; and overwriting the PUSCH data with UCI multiplexing data in the at least one bit. ### Claim 26 (depends on 25) The method of claim 25, further comprising: storing the starting boundary associated with each UL slot; wherein the at least one bit of the plurality of rate matching output bits corresponds to an end of one or more slots of the plurality of UL slots. ### Claim 27 (depends on 25) The method of claim 25, wherein the single TB corresponds to a TB over multiple slots (TBoMS). ### Claim 28 A method for wireless communication at a network entity, comprising: transmitting an indication of a physical uplink shared channel (PUSCH) configuration for a user equipment (UE), the PUSCH configuration being associated with an allocation of a plurality of rate matching output bits for a modulation process, a slot length for each UL slot of a plurality of UL slots being associated with the plurality of rate matching output bits, each UL slot including a starting point for the plurality of rate matching output bits, the slot length for each UL slot being associated with a starting boundary, the plurality of UL slots being associated with at least one of a single transport block (TB) or a single rate matching; and receive an UL transmission based on an allocation of one or more bits of the plurality of rate matching output bits and on at least one bit of the plurality of rate matching output bits that is associated with uplink control information (UCI) multiplexing wherein PUSCH data in the at least one bit is overwritten with UCI multiplexing data.