# US 2025/0096808 A1 · Voltage-controlled oscillator and phase-locked loop

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- Number: US 2025/0096808 A1
- Document ID: US20250096808A1
- Status: Published application
- Kind: A1
- Application number: 18/822,516
- Filed: 2024-09-03
- Published: 2025-03-20
- Earliest claimed: 2023-09-19
- Assignees: Realtek Semiconductor Corp.
- Applicants: Realtek Semiconductor Corporation
- Inventors: KUO-WEI WU; Yen-Ju Lin
- Web page: https://patentgrep.com/patent/US20250096808A1

## CPC

- H03L 7/0995: {the oscillator comprising a ring oscillator}
- H03L 7/0891: {the up-down pulses controlling source and sink current generators, e.g. a charge pump}
- H03L 7/093: using special filtering or amplification characteristics in the loop (H03L7/087 - H03L7/091 take precedence)
- H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B)

## Abstract

A voltage-controlled oscillator includes an input circuit, a first current supply circuit, a second current supply circuit, a filtering circuit, and an oscillating circuit. The input circuit includes an operational amplifier and a first input transistor. The operational amplifier generates an output voltage according to an input voltage and a feedback voltage. The first input transistor generates an input current according to the output voltage and a power supply voltage. The first current supply circuit generates a first output current according to the input current. The second current supply circuit generates a second output current according to the input current. The filtering circuit couples to the input circuit and the second current supply circuit, and decrease an influence caused by a variation of the input current on the second current supply circuit. The oscillating circuit generates an output clock according to the first output current and the second output current.

## Claims

### Claim 1

A voltage-controlled oscillator, comprising:
an input circuit, comprising:
an operational amplifier, configured to generate an output voltage according to an input voltage and a feedback voltage; and
a first input transistor, configured to generate an input current according to the output voltage and a power supply voltage;
a first current supply circuit, configured to generate a first output current according to the input current;
a second current supply circuit, configured to generate a second output current according to the input current;
a filtering circuit, coupled to the input circuit and the second current supply circuit, and configured to reduce an influence caused by a variation of the input current on the second current supply circuit; and
an oscillating circuit, configured to generate an output clock according to the first output current and the second output current.

### Claim 2 (depends on 1)

The voltage-controlled oscillator of claim 1, wherein the second output current is larger than the first output current.

### Claim 3 (depends on 1)

The voltage-controlled oscillator of claim 1, wherein a ratio of the second output current to the first output current is a value ranging from 10 to 40.

### Claim 4 (depends on 1)

The voltage-controlled oscillator of claim 1, wherein the first input transistor comprises:
a high voltage terminal, configured to receive the power supply voltage;
a control terminal, configured to receive the output voltage; and
a low voltage terminal, configured to output the input current.

### Claim 5 (depends on 1)

The voltage-controlled oscillator of claim 1, wherein the operational amplifier comprises:
an inverting terminal, configured to receive the input voltage;
a non-inverting terminal, coupled to a low voltage terminal of the first input transistor, and configured to receive the feedback voltage; and
an output terminal, coupled to a control terminal of the first input transistor, and configured to output the output voltage.

### Claim 6 (depends on 1)

The voltage-controlled oscillator of claim 1, wherein an output terminal of the operational amplifier is coupled to the second current supply circuit through the filtering circuit.

### Claim 7 (depends on 1)

The voltage-controlled oscillator of claim 1, wherein the input circuit further comprises:
a second input transistor, comprising:
a high voltage terminal, coupled to a low voltage terminal of the first input transistor and a non-inverting terminal of the operational amplifier;
a control terminal, coupled to the high voltage terminal of the second input transistor; and
a low voltage terminal, coupled to a low potential terminal.

### Claim 8 (depends on 1)

The voltage-controlled oscillator of claim 1, wherein the first current supply circuit comprises:
a first output transistor, comprising:
a high voltage terminal, configured to receive the power supply voltage;
a control terminal, coupled to an output terminal of the operational amplifier, and configured to receive the output voltage; and
a low voltage terminal, configured to generate the first output current.

### Claim 9 (depends on 8)

The voltage-controlled oscillator of claim 8, wherein the second current supply circuit comprises:
a second output transistor, comprising:
a high voltage terminal, configured to receive the power supply voltage;
a control terminal, coupled to the output terminal of the operational amplifier through the filtering circuit, and configured to receive the output voltage; and
a low voltage terminal, configured to generate the second output current.

### Claim 10 (depends on 9)

The voltage-controlled oscillator of claim 9, wherein the filtering circuit comprises:
a capacitor, configured to receive the power supply voltage; and
a resistor, coupled to the output terminal of the operational amplifier and the control terminal of the second output transistor.

### Claim 11 (depends on 10)

The voltage-controlled oscillator of claim 10, wherein the resistor comprises:
a first terminal, coupled to the output terminal of the operational amplifier; and
a second terminal, coupled to the capacitor and the control terminal of the second output transistor.

### Claim 12 (depends on 7)

The voltage-controlled oscillator of claim 7, wherein the input circuit further comprises:
a third input transistor, configured to generate a mirror current according to the input current.

### Claim 13 (depends on 12)

The voltage-controlled oscillator of claim 12, wherein the third input transistor comprises:
a high voltage terminal, configured to receive the power supply voltage;
a control terminal, coupled to an output terminal of the operational amplifier, and configured to receive the output voltage; and
a low voltage terminal, configured to output the mirror current.

### Claim 14 (depends on 13)

The voltage-controlled oscillator of claim 13, wherein the input circuit further comprises:
a fourth input transistor, comprising:
a high voltage terminal, coupled to the low voltage terminal of the third input transistor;
a control terminal, coupled to the high voltage terminal of the fourth input transistor; and
a low voltage terminal, coupled to the low potential terminal.

### Claim 15 (depends on 14)

The voltage-controlled oscillator of claim 14, wherein the first current supply circuit comprises:
a first output transistor, comprising:
a high voltage terminal, coupled to the oscillating circuit;
a control terminal, coupled to the low voltage terminal of the third input transistor and the high voltage terminal of the fourth input transistor; and
a low voltage terminal, coupled to the low potential terminal.

### Claim 16 (depends on 15)

The voltage-controlled oscillator of claim 15, wherein the second current supply circuit comprises:
a second output transistor, comprising:
a high voltage terminal, coupled to the oscillating circuit;
a control terminal, coupled to the low voltage terminal of the third input transistor and the high voltage terminal of the fourth input transistor through the filtering circuit; and
a low voltage terminal, coupled to the low potential terminal.

### Claim 17 (depends on 16)

The voltage-controlled oscillator of claim 16, wherein the filtering circuit comprises:
a capacitor, coupled to the low potential terminal; and
a resistor, coupled to the low voltage terminal of the third input transistor and the high voltage terminal of the fourth input transistor, and coupled to the control terminal of the second output transistor.

### Claim 18 (depends on 17)

The voltage-controlled oscillator of claim 17, wherein the resistor comprises:
a first terminal, coupled to the low voltage terminal of the third input transistor and the high voltage terminal of the fourth input transistor; and
a second terminal, coupled to the capacitor and the control terminal of the second output transistor.

### Claim 19

A phase-locked loop, comprising:
a phase-frequency detector, configured to detect a difference between a reference clock and a feedback clock to output a detection signal;
a charge pump, configured to generate a charging/discharging signal according to the detection signal;
a first filtering circuit, configured to determine an input voltage according to the charging/discharging signal;
a voltage-controlled oscillator, comprising:
an input circuit, comprising:
an operational amplifier, configured to generate an output voltage according to the input voltage and a feedback voltage; and
a first input transistor, configured to generate an input current according to the output voltage and a power supply voltage;
a first current supply circuit, configured to generate a first output current according to the input current;
a second current supply circuit, configured to generate a second output current according to the input current;
a second filtering circuit, coupled to the input circuit and the second current supply circuit, and configured to reduce an influence caused by a variation of the input current on the second current supply circuit; and
an oscillating circuit, configured to generate an output clock according to the first output current and the second output current; and
a loop divider, configured to generate the feedback clock according to the output clock,
wherein a ratio of a filter bandwidth of the second filtering circuit to a loop bandwidth of the phase-locked loop is not larger than 0.01.

### Claim 20 (depends on 19)

The phase-locked loop of claim 19, wherein the second output current is larger than the first output current.
