# US 2025/0096791 A1 · Gate driver output protection circuit

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- Number: US 2025/0096791 A1
- Document ID: US20250096791A1
- Status: Published application
- Kind: A1
- Application number: 18/815,080
- Filed: 2024-08-26
- Published: 2025-03-20
- Earliest claimed: 2021-04-28
- Assignees: Skyworks Solutions, Inc.
- Applicants: Skyworks Solutions, Inc.
- Inventors: Péter Onódy; Tamás Marozsák; Michael R. May; Fernando Naim Lavalle Aviles; Patrick De Bakker
- Web page: https://patentgrep.com/patent/US20250096791A1

## CPC

- H03K 17/0828: {in composite switches}
- H03K 17/145: {in field-effect transistor switches}
- H03K 17/18: Modifications for indicating state of switch
- H03K 17/284: in field effect transistor switches
- H03K 2017/0806: {against excessive temperature}
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

A method for protecting a system including a driver integrated circuit includes receiving a driver input signal. The method includes driving an output signal externally to the driver integrated circuit. The output signal is driven based on the driver input signal and an indication of a delay between receipt of an edge of the driver input signal and arrival of a corresponding edge of the output signal at an output node coupled to a terminal of the driver integrated circuit.

## Claims

### Claim 1

(canceled)

### Claim 2

A method for protecting a system including a driver integrated circuit, the method comprising:
generating one or more indications of whether one or more edges of a driver input signal are delayed in an output signal at an output node of the driver integrated circuit coupled to a terminal of the driver integrated circuit;
generating an error signal based on the one or more indications; and
in response to the error signal, adjusting driving of the output signal externally to the driver integrated circuit.

### Claim 3 (depends on 2)

The method of claim 2 wherein generating the one or more indications includes generating a counter value indicative of an amount of delay.

### Claim 4 (depends on 3)

The method of claim 3 wherein generating the counter value includes incrementing the counter value during delay intervals and decrementing the counter value during non-delay intervals.

### Claim 5 (depends on 2)

The method of claim 2 wherein generating the error signal is based on an average of delay over time.

### Claim 6 (depends on 2)

The method of claim 2 wherein driving the output signal includes configuring an output driver to enter a safer output state for a predetermined interval in response to detecting an error condition based on the one or more indications.

### Claim 7 (depends on 6)

The method of claim 6 wherein driving the output signal further includes transitioning from the safer output state to a normal state in response to expiration of the predetermined interval in the safer output state.

### Claim 8 (depends on 6)

The method of claim 6 wherein the output driver is configured to transition to the safer output state from a second safer output state and in response to a second expiration of a second predetermined interval in the second safer output state, and driving the output signal further includes transitioning to the second safer output state from a normal output state.

### Claim 9 (depends on 6)

The method of claim 6 wherein in the safer output state, an output device of the output driver is configured in a strong pull-down configuration or a weak pull-down configuration, the output driver being configured in the weak pull-down configuration from the strong pull-down configuration after a predetermined period of time.

### Claim 10 (depends on 2)

The method of claim 2 further comprising:
generating an indication of a sensed temperature of a die of the driver integrated circuit; and
configuring an output driver to enter a safer output state in response to the indication of the sensed temperature exceeding a predetermined threshold.

### Claim 11

An driver integrated circuit comprising:
a logic circuit configured to generate one or more indications of whether one or more edges a driver input signal are delayed in an output signal, and to generate an error signal based on the one or more indications; and
a driver circuit configured to drive the output signal to a terminal of the driver integrated circuit based on a driver input signal and the error signal.

### Claim 12 (depends on 11)

The driver integrated circuit of claim 11 wherein the logic circuit includes a counter circuit configured to increment a counter value corresponding to an amount of delay, and generation of the error signal is based on the counter value.

### Claim 13 (depends on 12)

The driver integrated circuit of claim 12 wherein the counter circuit is further configured to increment the counter value during delay intervals delay intervals and decrement the counter value during non-delay intervals.

### Claim 14 (depends on 11)

The driver integrated circuit of claim 11 wherein generation of the error signal is based on an average of delay over time.

### Claim 15 (depends on 11)

The driver integrated circuit of claim 11 wherein the logic circuit is further configured to drive the output signal by configuring an output driver to enter a safer output state for a predetermined interval in response to detecting an error condition based on the one or more indications.

### Claim 16 (depends on 15)

The driver integrated circuit of claim 15 wherein the logic circuit is further configured to transition the output driver from the safer output state to a normal state in response to expiration of a predetermined interval in the safer output state and no other error condition being detected.

### Claim 17 (depends on 15)

The driver integrated circuit of claim 15 wherein the logic circuit is further configured to transition the output driver to the safer output state from a second safer output state and in response to a second expiration of a second predetermined interval in the second safer output state, and driving the output signal further includes transitioning to the second safer output state from a normal output state.

### Claim 18 (depends on 15)

The driver integrated circuit of claim 15 wherein in the safer output state, an output device of the output driver is configured in a strong pull-down configuration or a weak pull-down configuration, the output driver being configured in the weak pull-down configuration from the strong pull-down configuration after a predetermined period of time.

### Claim 19 (depends on 11)

The driver integrated circuit of claim 11 further comprising a temperature sensor configured to sense a temperature of the driver integrated circuit, and the logic circuit configured to cause an output driver to enter a safer output state in response to the temperature sensed by the temperature sensor exceeding a predetermined threshold.

### Claim 20

An electronics system comprising:
a gate driver integrated circuit including a logic circuit configured to generate one or more indications of whether one or more edges a driver input signal are delayed in an output signal, and to generate an error signal based on the one or more indications, and further including a driver circuit configured to drive the output signal to a terminal of the gate driver integrated circuit based on the driver input signal and the error signal; and
a drive transistor coupled to the terminal of the gate driver integrated circuit to receive the output signal.

### Claim 21 (depends on 20)

The electronics system of claim 20 further comprising an isolation barrier and isolation communications channel, the driver input signal received from the isolation communications channel.
