# US 2025/0096449 A1 · Acoustic waveguide with diffraction grating

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- Number: US 2025/0096449 A1
- Document ID: US20250096449A1
- Status: Published application
- Kind: A1
- Application number: 18/966,756
- Filed: 2024-12-03
- Published: 2025-03-20
- Earliest claimed: 2021-06-14
- Applicants: Texas Instruments Incorporated
- Inventors: Bichoy BAHR; Benjamin Stassen COOK; Scott R. SUMMERFELT
- Web page: https://patentgrep.com/patent/US20250096449A1

## CPC

- H01P 3/12: Hollow waveguides (H01P3/20 takes precedence)
- H05K 1/181: associated with surface mounted components
- H10W 74/111: {the semiconductor body being completely enclosed}
- H10W 74/124: {the encapsulations having cavities other than that occupied by chips}
- H10W 74/141: {the encapsulations being on at least the sidewalls of the semiconductor body}
- H10W 76/40: Fillings or auxiliary members in containers, e.g. centering rings (fillings or auxiliary members for thermal protection or control in containers or encapsulations H10W40/70)
- H10W 90/00: Package configurations
- H05K 3/3436: {having an array of bottom contacts, e.g. pad grid array or ball grid array components}
- H05K 2201/09063: Holes or slots in insulating substrate not used for electrical connections
- H05K 2201/09072: Hole or recess under component or special relationship between hole and component
- H05K 2201/10083: Electromechanical or electro-acoustic component, e.g. microphone
- H05K 2201/10734: Ball grid array [BGA]; Bump grid array
- H10W 72/0198: {batch processes}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/9413: {on encapsulations}
- H10W 74/10: characterised by their shape or disposition
- H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H01P: WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE (operating at optical frequencies G02B)
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

In some examples, a package includes a semiconductor die having a first surface and a second surface opposing the first surface, the semiconductor die including circuitry in the first surface. The package also includes an acoustic waveguide in the semiconductor die, the acoustic waveguide including an array of capacitors and a connector coupling the circuitry to the acoustic waveguide.

## Claims

### Claim 1

A package, comprising:
a semiconductor die having a first surface and a second surface opposing the first surface, the semiconductor die including circuitry in the first surface;
an acoustic waveguide in the semiconductor die, the acoustic waveguide including an array of capacitors; and
a connector coupling the circuitry to the acoustic waveguide.

### Claim 2 (depends on 1)

The package of claim 1, wherein the array of capacitors is an array of piezoelectric capacitors or an array of ferroelectric capacitors.

### Claim 3 (depends on 1)

The package of claim 1, the array of capacitors comprising a transducer portion and a diffraction grating portion, the transducer portion configured to convert signals between electrical signals and acoustic waves, the diffraction grating portion configured to direct the acoustic waves toward and receive the acoustic waves from the second surface.

### Claim 4 (depends on 3)

The package of claim 3, wherein the transducer portion has a first row of capacitors and a second row of capacitors, capacitors in the first row of capacitors having a first size, capacitors in the second row of capacitors having a second size, the second size different than the first size.

### Claim 5 (depends on 1)

The package of claim 1, wherein the package includes a mold compound covering the semiconductor die, the mold compound including a cavity through which the second surface is exposed to an environment of the package.

### Claim 6 (depends on 1)

The package of claim 1, wherein the package is a quad flat no lead (QFN) package adapted to be coupled to a printed circuit board (PCB), the package including multiple conductive terminals adapted to be coupled to the PCB, the second surface facing the multiple conductive terminals.

### Claim 7 (depends on 6)

The package of claim 6, wherein a portion of the array of capacitors is configured to direct the acoustic waves through the second surface and through an orifice in the PCB.

### Claim 8

A device comprising:
a semiconductor die; and
an acoustic waveguide including an array of piezoelectric capacitors in the semiconductor die, the array of piezoelectric capacitors comprising:
a first portion comprising first piezoelectric capacitors, the first piezoelectric capacitors having a first size;
a second portion adjacent the first portion, the second portion comprising second piezoelectric capacitors, the second piezoelectric capacitors having a second size, the second size smaller than the first size; and
a third portion adjacent the second portion, the third portion comprising a first row of third piezoelectric capacitors and a second row of fourth piezoelectric capacitors, the third piezoelectric capacitors having a third size, fourth piezoelectric capacitors having a fourth size, the fourth size different than the third size.

### Claim 9 (depends on 8)

The device of claim 8, wherein the first piezoelectric capacitors form a first two-dimensional array and the second piezoelectric capacitors form a second two-dimensional array.

### Claim 10 (depends on 8)

The device of claim 8, wherein the first portion is configured to reflect acoustic waves propagating through the acoustic waveguide, and the second portion is configured to conduct acoustic waves propagating through the acoustic waveguide.

### Claim 11 (depends on 8)

The device of claim 8, wherein the third portion is configured to direct acoustic waves propagating horizontally through the acoustic waveguide in a vertical direction.

### Claim 12 (depends on 8)

The device of claim 8, wherein the array of piezoelectric capacitors includes a fourth portion comprising capacitors having a fifth size smaller than the second size.

### Claim 13 (depends on 8)

The device of claim 8, wherein capacitors in the first, second, and third portions of piezoelectric capacitors includes first and second metal contacts, the first metal contact coupled to circuitry configured to drive the capacitor, the second metal contact coupled to first and second metal layers.

### Claim 14

A package comprising:
a semiconductor die having a surface; and
an acoustic waveguide in the semiconductor die, the acoustic waveguide including an array of capacitors, the array of capacitors including a transducer portion and a diffraction grating portion, the transducer portion configured to produce first acoustic waves based on receiving first electrical signals and to produce second electrical signals based on receiving second acoustic waves, the diffraction grating portion configured to direct the first acoustic waves toward the surface and to receive the second acoustic waves from the surface.

### Claim 15 (depends on 14)

The package of claim 14, wherein the surface is a first surface and the semiconductor die has a second surface opposite the first surface, the package further comprising a mold compound over the second surface of the semiconductor die and a portion of the first surface, a cavity in the mold compound exposing a portion of the first surface.

### Claim 16 (depends on 15)

The package of claim 15, further comprising a printed circuit board (PCB), the package coupled to the PCB with the second surface facing the PCB.

### Claim 17 (depends on 16)

The package of claim 16, wherein the diffraction grating portion is configured to direct the first acoustic waves toward an orifice the PCB and to receive the second acoustic waves from the orifice in the PCB.

### Claim 18 (depends on 15)

The package of claim 15, wherein the diffraction grating portion is configured to direct the first acoustic waves toward the cavity and receive the second acoustic waves from the cavity.

### Claim 19 (depends on 14)

The package of claim 14, wherein the acoustic waveguide further comprises a reflector portion configured to reflect the acoustic waves, and wherein the transducer portion is between the reflector portion and the diffraction grating portion.

### Claim 20 (depends on 19)

The package of claim 19, wherein the transducer portion of the acoustic waveguide, the diffraction grating portion of the acoustic waveguide, and the reflector portion of the acoustic waveguide are in a plane.