# US 2025/0096191 A1 · Direct bonding methods and structures for dies

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2025/0096191 A1
- Document ID: US20250096191A1
- Status: Published application
- Kind: A1
- Application number: 18/503,127
- Filed: 2023-11-06
- Published: 2025-03-20
- Earliest claimed: 2023-09-18
- Assignees: Adeia Semiconductor Bonding Technologies Inc.
- Applicants: Adeia Semiconductor Bonding Technologies Inc.
- Inventors: Guilian Gao; Gaius Gillman Fountain, JR.; Pawel Mrozek; Ron Zhang; Laura Wills Mirkarimi
- Web page: https://patentgrep.com/patent/US20250096191A1

## CPC

- H10W 80/312: {characterised by the direct bonding of electrically conductive pads}
- H10P 54/00: Cutting or separating of wafers, substrates or parts of devices
- H10W 74/111: {the semiconductor body being completely enclosed}
- H10W 80/327: {characterised by the direct bonding of insulating parts, e.g. of silicon oxide layers}
- H10W 90/792: {between multiple chips}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Disclosed herein are methods of forming a microelectronic device. In some embodiments, the methods include preparing a first surface of a first substrate for direct bonding and thinning the first substrate to form a thinned substrate, where the thinned substrate comprises the first surface and a second surface and where the first and second surfaces are on opposing sides of the thinned substrate. The method further includes, after thinning, depositing a stress balancing layer onto the second surface, singulating the thinned substrate to form a plurality of dies, and direct bonding at least one of the plurality of dies to a second substrate.

## Claims

### Claim 1

A method of forming a microelectronic device, comprising:
preparing a first surface of a first substrate for direct bonding;
thinning the first substrate to form a thinned substrate, wherein the thinned substrate comprises the first surface and a second surface and wherein the first and second surfaces are on opposing sides of the thinned substrate;
after thinning, depositing a stress balancing layer onto the second surface;
singulating the thinned substrate to form a plurality of dies; and
direct bonding at least one of the plurality of dies to a second substrate.

### Claim 2 (depends on 1)

The method of claim 1, wherein each of the plurality of dies comprises a portion of the first surface and a portion of the stress balancing layer.

### Claim 3 (depends on 2)

The method of claim 2, wherein the at least one of the plurality of dies comprises a first portion of the first surface that comprises a first conductive element and a first dielectric portion that surrounds the first conductive element, wherein the second substrate comprises a second conductive element and a second dielectric portion that surrounds the second conductive element, and wherein direct bonding the at least one of the plurality of dies to the second substrate comprises direct bonding the first conductive element to the second conductive element and direct bonding the first dielectric portion to the second dielectric portion.

### Claim 4

(canceled)

### Claim 5 (depends on 1)

The method of claim 1, wherein the first substrate does not include a TSV.

### Claim 6 (depends on 1)

The method of claim 1, wherein a portion of the stress balancing layer remains on the at least one of the plurality of dies during direct bonding.

### Claim 7 (depends on 1)

The method of claim 1, wherein the stress balancing layer comprises a silicon oxide.

### Claim 8

(canceled)

### Claim 9 (depends on 1)

The method of claim 1, wherein thinning the first substrate comprises thinning the first substrate to have a thickness of about 100 μm or less.

### Claim 10

(canceled)

### Claim 11

(canceled)

### Claim 12

An apparatus, comprising:
a substrate having a first bonding surface; and
a die, wherein the die comprises:
a second bonding surface on a first side of the die, wherein the second bonding surface is directly bonded to the first bonding surface; and
a backside dielectric layer that forms a second side of the die, wherein the second side of the die is opposite the first side of the die and wherein the backside dielectric layer comprises an unpatterned dielectric layer.

### Claim 13 (depends on 12)

The apparatus of claim 12, wherein the first side of the die comprises a plurality of edges defining a perimeter of the first side of the die and wherein the backside dielectric layer does not extend beyond the perimeter of the first side of the die.

### Claim 14 (depends on 12)

The apparatus of claim 12, wherein the die comprises a plurality of side surfaces that extend between the first and second sides of the die and wherein the backside dielectric layer does not contact any of the plurality of side surfaces.

### Claim 15 (depends on 12)

The apparatus of claim 12, wherein the die comprises a first die, the apparatus further comprising:
a second die bonded to the first bonding surface, wherein the first and second dies are separated from each other by a lateral gap and wherein the backside dielectric layer does not extend into the lateral gap.

### Claim 16 (depends on 15)

The apparatus of claim 15, further comprising:
a reconstitution layer formed over the first and second dies, including over the backside dielectric layer of the first die, wherein the reconstitution layer at least partially fills the lateral gap.

### Claim 17

(canceled)

### Claim 18 (depends on 12)

The apparatus of claim 12, wherein the die has a first thickness of about 200 μm or less and the backside dielectric layer has a second thickness of about 10 μm or less.

### Claim 19 (depends on 18)

The apparatus of claim 18, wherein the first thickness is about 100 μm or less.

### Claim 20

(canceled)

### Claim 21

(canceled)

### Claim 22 (depends on 12)

The apparatus of claim 12, wherein the die does not include a through-silicon via.

### Claim 23

A method of forming a microelectronic device, comprising:
providing a first substrate having a first surface;
determining a bow of the first substrate;
determining a thickness of a stress balancing layer to be formed based in part on the measured bow;
thinning the first substrate to form a thinned substrate, wherein the thinned substrate comprises the first surface and second surface and wherein the first and second surfaces are on opposing sides of the thinned substrate;
forming the stress balancing layer onto the second surface such that the stress balancing layer has the determined thickness;
after forming the stress balancing layer onto the second surface, singulating the thinned substrate into a plurality of dies; and
direct bonding at least one of the plurality of dies to a second substrate.

### Claim 24 (depends on 23)

The method of claim 23, wherein singulating the thinned substrate into a plurality of dies comprises singulating the thinned substrate into a plurality of dies such that each of the plurality of dies has a die size and wherein determining the thickness of the stress balancing layer to be formed is based in part on the die size.

### Claim 25 (depends on 23)

The method of claim 23, further comprising:
calculating a die bow based in part on the measured bow, wherein determining the thickness of the stress balancing layer to be formed is based in part on the calculated die bow.

### Claim 26

(canceled)

### Claim 27 (depends on 23)

The method of claim 23, wherein the stress balancing layer comprises an inorganic dielectric.

### Claim 28 (depends on 23)

The method of claim 23, further comprising:
after determining the thickness of the stress balancing layer to be formed, determining an amount of dielectric to be deposited based in part on the determined thickness of the stress balancing layer, wherein forming the stress balancing layer onto the second surface comprises depositing the determined amount of dielectric onto the second surface.
