# US 2025/0096142 A1 · Electro-optic bridge chips for chip-to-chip communication > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2025/0096142 A1 - Document ID: US20250096142A1 - Status: Published application - Kind: A1 - Application number: 18/368,152 - Filed: 2023-09-14 - Published: 2025-03-20 - Earliest claimed: 2023-09-14 - Assignees: GlobalFoundries U.S. Inc. - Applicants: GlobalFoundries U.S. Inc. - Inventors: Jae Kyu Cho - Web page: https://patentgrep.com/patent/US20250096142A1 ## CPC - H10W 70/65: Shapes or dispositions of interconnections - G02B 6/12002: {Three-dimensional structures} - G02B 6/1228: {Tapered waveguides, e.g. integrated spot-size transformers (for coupling with fibres G02B6/305)} - G02B 6/43: Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections - H10W 90/00: Package configurations - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - G02B: OPTICAL ELEMENTS, SYSTEMS OR APPARATUS ## Abstract Structures including an electro-optic bridge chip and methods of forming such structures. The structure comprises a photonics chip and an electro-optic bridge chip on a package substrate. The electro-optic bridge chip includes a waveguide core and an electrical trace line. A portion of the waveguide core is coupled to an optical coupler of the photonics chip. ## Claims ### Claim 1 A structure comprising: a package substrate; a first photonics chip on the package substrate, the first photonics chip including an optical coupler and a bond pad; and an electro-optic bridge chip on the package substrate, the electro-optic bridge chip including a waveguide core and an electrical trace line, the electrical trace line coupled to the bond pad of the first photonics chip, and the waveguide core including a first portion that is coupled to the optical coupler of the first photonics chip. ### Claim 2 (depends on 1) The structure of claim 1 wherein the package substrate includes a recess, and the electro-optic bridge chip is disposed inside the recess. ### Claim 3 (depends on 2) The structure of claim 2 wherein the package substrate includes a plurality of electrical interconnects that are coupled to the first photonics chip. ### Claim 4 (depends on 1) The structure of claim 1 wherein the electro-optic bridge chip includes a dielectric layer, and the waveguide core is disposed in the dielectric layer. ### Claim 5 (depends on 4) The structure of claim 4 wherein the package substrate has a top surface, and the waveguide core is disposed in the dielectric layer above the top surface of the package substrate. ### Claim 6 (depends on 4) The structure of claim 4 wherein the package substrate has a top surface, and the dielectric layer has a top surface that is disposed above the top surface of the package substrate. ### Claim 7 (depends on 4) The structure of claim 4 wherein the package substrate has a top surface, and the dielectric layer is disposed on the top surface of the package substrate. ### Claim 8 (depends on 4) The structure of claim 4 wherein the dielectric layer has a top surface, and the waveguide core is disposed adjacent to the top surface of the dielectric layer. ### Claim 9 (depends on 1) The structure of claim 1 wherein the package substrate has a top surface, the electro-optic bridge chip includes one or more dielectric layers, the electrical trace line is disposed in the one or more dielectric layers, and the waveguide core is disposed over the electrical trace line. ### Claim 10 (depends on 9) The structure of claim 9 wherein the electro-optic bridge chip includes a support substrate, and the one or more dielectric layers are disposed on the support substrate. ### Claim 11 (depends on 9) The structure of claim 9 wherein the one or more dielectric layers have a top surface that is coplanar with the top surface of the package substrate. ### Claim 12 (depends on 1) The structure of claim 1 wherein the waveguide core is centered over the electrical trace line. ### Claim 13 (depends on 1) The structure of claim 1 wherein the first portion of the waveguide core is a tapered section, the optical coupler includes a tapered section, and the tapered section of the waveguide core overlaps with the tapered section of the optical coupler. ### Claim 14 (depends on 1) The structure of claim 1 further comprising: a second photonics chip on the package substrate, the second photonics chip including an optical coupler, wherein the waveguide core of the electro-optic bridge chip includes a second portion that is coupled to the optical coupler of the second photonics chip. ### Claim 15 (depends on 14) The structure of claim 14 wherein the first photonics chip includes a bond pad, the second photonics chip includes a bond pad, and the electrical trace line couples the bond pad of the first photonics chip to the bond pad of the second photonics chip. ### Claim 16 (depends on 1) The structure of claim 1 further comprising: a non-photonics chip on the package substrate, the non-photonics chip including an optical coupler, wherein the waveguide core of the electro-optic bridge chip includes a second portion that is coupled to the optical coupler of the non-photonics chip. ### Claim 17 (depends on 16) The structure of claim 16 wherein the non-photonics chip is an application-specific integrated circuit. ### Claim 18 A method comprising: forming an electro-optic bridge chip including a waveguide core and an electrical trace line; attaching the electro-optic bridge chip to a package substrate; and attaching a first photonics chip to the package substrate, wherein the first photonics chip includes an optical coupler, and the waveguide core includes a first portion that is coupled to the optical coupler of the first photonics chip. ### Claim 19 (depends on 18) The method of claim 18 further comprising: attached a second photonics chip to the package substrate, wherein the second photonics chip includes an optical coupler, and the waveguide core of the electro-optic bridge chip includes a second portion that is coupled to the optical coupler of the second photonics chip. ### Claim 20 (depends on 19) The method of claim 19 wherein the first photonics chip includes a bond pad, the second photonics chip includes a bond pad, and the electrical trace line couples the bond pad of the first photonics chip to the bond pad of the second photonics chip.