# US 2025/0096110 A1 · Semiconductor device and method for producing same

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- Number: US 2025/0096110 A1
- Document ID: US20250096110A1
- Status: Published application
- Kind: A1
- Application number: 18/967,990
- Filed: 2024-12-04
- Published: 2025-03-20
- Earliest claimed: 2018-01-19
- Assignees: Rohm Co., Ltd.
- Applicants: Rohm Co., Ltd.
- Inventors: Minoru AKUTSU; Kentaro CHIKAMATSU
- Web page: https://patentgrep.com/patent/US20250096110A1

## CPC

- H10W 20/495: {Capacitive arrangements or effects of, or between wiring layers}
- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 30/4755: {having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 64/011: {of electrodes ohmically coupled to a semiconductor}
- H10D 64/112: {comprising multiple field plate segments}
- H10D 64/257: {for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes (source or drain electrodes of TFTs H10D30/673)}
- H10D 64/258: {characterised by the relative positions of the source or drain electrodes with respect to the gate electrode}
- H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates}
- H10D 64/517: {characterised by the conducting layers}
- H10D 64/256: {for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673)}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device has an electrode structure that includes source electrodes, a gate electrode, and drain electrodes disposed on a semiconductor laminated structure and extending in parallel to each other and in a predetermined first direction and a wiring structure that includes source wirings, drain wirings, and gate wirings disposed on the electrode structure and extending in parallel to each other and in a second direction orthogonal to the first direction. The source wirings, the drain wirings, and the gate wirings are electrically connected to the source electrodes, the drain electrodes, and the gate electrode, respectively. The semiconductor device includes a conductive film disposed between the gate electrode and the drain wirings and being electrically connected to the source electrodes.

## Claims

### Claim 1

A semiconductor device comprising:
a source electrode, a gate electrode, and a drain electrode disposed on a semiconductor laminated structure;
a source wiring electrically connected to the source electrode;
a drain wiring electrically connected to the drain electrode;
a gate wiring connected to the gate electrode;
a first conductive film electrically connected to the source electrode; and
a second conductive film electrically connected to the source electrode,
wherein in a certain cross section,
the first conductive film is disposed between the gate electrode and the drain electrode, and an upper surface thereof is disposed closer to the semiconductor laminated structure than an upper surface of the gate electrode, and
the second conductive film is disposed above the gate electrode and below the drain wiring.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein a part of the first conductive film is covered by a part of the second conductive film.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, further comprising:
a third conductive film,
wherein the third conductive film is disposed between the source electrode and the gate electrode.

### Claim 4 (depends on 3)

The semiconductor device according to claim 3, wherein the second conductive film is disposed above the third conductive film.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, wherein the first conductive film has a portion extending in a direction parallel to a surface of the semiconductor laminated structure.

### Claim 6 (depends on 5)

The semiconductor device according to claim 5, wherein the second conductive film has a portion extending in a direction parallel to a surface of said semiconductor laminated structure.

### Claim 7 (depends on 6)

The semiconductor device according to claim 6 wherein the third conductive film has a portion extending in a direction parallel to a surface of said semiconductor laminated structure.

### Claim 8 (depends on 7)

The semiconductor device according to claim 7, wherein the third conductive film is formed in the same layer as the first conductive film.

### Claim 9 (depends on 8)

The semiconductor device according to claim 8, wherein the source electrode, the gate electrode and the drain electrode extend in a predetermined first direction, and
the second conductive film extends in the first direction along the upper surface of the gate electrode.

### Claim 10 (depends on 9)

The semiconductor device according to claim 9, wherein a width of the second conductive film is greater than a width of the upper surface of the gate electrode, and in plan view, each side edge of the second conductive film projects further outward from a corresponding side edge of the upper surface of the gate electrode.

### Claim 11 (depends on 10)

The semiconductor device according to claim 10, wherein an amount of projection of each side edge of the second conductive film from the corresponding side edge of the upper surface of the gate electrode is not less than 0.3 μm and not more than 0.9 μm.

### Claim 12 (depends on 11)

The semiconductor device according to claim 11, wherein a distance between the upper surface of the gate electrode and a lower surface of the second conductive film is not less than 0.15 μm and not more than 0.25 μm.

### Claim 13 (depends on 12)

The semiconductor device according to claim 12, wherein the source electrode and the drain electrode are disposed apart from the gate electrode such as to sandwich the gate electrode.

### Claim 14 (depends on 13)

The semiconductor device according to claim 13, wherein the semiconductor laminated structure includes an active area including an element structure arranged by sandwiching the gate electrode with the source electrode and the drain electrode and a nonactive area outside the active area and in the nonactive area, the source wiring and the second conductive film are electrically connected.

### Claim 15 (depends on 14)

The semiconductor device according to claim 14, wherein the semiconductor laminated structure includes an electron transit layer and an electron supply layer formed on the electron transit layer and having formed therein a lower opening portion reaching the electron transit layer,
an insulating layer having an upper opening portion in communication with the lower opening portion is formed on the semiconductor laminated structure,
a gate insulating film is formed such as to cover a front surface of the insulating layer and
a bottom portion and a side portion of a gate opening portion constituted of the lower opening portion and the upper opening portion, and
the gate electrode is formed on the gate insulating film inside the gate opening portion.

### Claim 16 (depends on 15)

The semiconductor device according to claim 15, wherein the first conductive film is embedded in the insulating layer between the gate electrode and the drain electrode, is insulated from the gate electrode, and is electrically connected to the source electrode, and
the first conductive film is exposed at an intermediate height position on one side of the gate opening.

### Claim 17 (depends on 16)

The semiconductor device according to claim 16, wherein the third conductive film is embedded in the insulating layer between the gate electrode and the source electrode and is insulated from the gate electrode and the source electrode.

### Claim 18 (depends on 17)

The semiconductor device according to claim 17, further comprising: a side wall of an insulating property disposed between the gate insulating film and the side portion of the gate opening portion.

### Claim 19 (depends on 18)

The semiconductor device according to claim 18, wherein the gate electrode includes an overlap portion formed on the gate insulating film at a peripheral edge of the gate opening portion.

### Claim 20 (depends on 19)

The semiconductor device according to claim 19, wherein the third conductive film is electrically connected to none of the source electrode, the gate electrode and the drain electrode.
