Io interconnect cage structure for package form reduction
AssigneeQUALCOMM Incorporated
InventorsAniket PATIL, Piyush GUPTA, Durodami LISK
Life of this patent
Estimating the term…
Abstract
Disclosed are package devices that include interconnects on first and second surfaces of a package substrate. The interconnects on the first surface of the package substrate are configured to carry general purpose input-output (GPIO) and miscellaneous IO signals. The interconnects on the second surface of the package substrate are configured to carry high speed input-output (HSIO) signals-signals whose speeds are above some minimum speed threshold. In this way, the package form can be reduced while still allowing for increased number of IO signals to be delivered.
Claims27
A package device, comprising:
- a package substrate including a first surface, a second surface opposite the first surface, and a peripheral edge;
- a die on a first inner portion the first surface of the package substrate, the first inner portion being located a first distance away from the peripheral edge of the package substrate;
- a plurality of first substrate interconnects on a first outer portion of the first surface of the package substrate, the first outer portion surrounding the first inner portion, the plurality of first substrate interconnects being electrically coupled to the die;
- a plurality of second substrate interconnects on a second outer portion of the second surface of the package substrate, the second outer portion being a portion of the second surface of the package substrate from the peripheral edge to a second distance away from the peripheral edge;
- and
- one or more interconnect cages, a first end of each interconnect cage being coupled to one or more of the first substrate interconnects, and each interconnect cage being configured to provide electrical coupling between the die and connections outside a physical boundary of the package substrate.
A method of fabricating a package device, the method comprising:
- providing a package substrate including a first surface, a second surface opposite the first surface, and a peripheral edge;
- providing a die on a first inner portion the first surface of the package substrate, the first inner portion being located a first distance away from the peripheral edge of the package substrate;
- forming a plurality of first substrate interconnects on a first outer portion of the first surface of the package substrate, the first outer portion surrounding the first inner portion, the plurality of first substrate interconnects being electrically coupled to the die;
- forming a plurality of second substrate interconnects on a second outer portion of the second surface of the package substrate, the second outer portion being a portion of the second surface of the package substrate from the peripheral edge to a second distance away from the peripheral edge;
- and
- forming one or more interconnect cages, a first end of each interconnect cage being coupled to one or more of the first substrate interconnects, and each interconnect cage being configured to provide electrical coupling between the die and connections outside a physical boundary of the package substrate.
Dependencies are inferred from the claim text.