# US 2025/0094682 A1 · Analog ECO Flow

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- Number: US 2025/0094682 A1
- Document ID: US20250094682A1
- Status: Published application
- Kind: A1
- Application number: 18/470,539
- Filed: 2023-09-20
- Published: 2025-03-20
- Earliest claimed: 2023-09-20
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Ayushi Agrawal; Yu-Tao Yang; Ming-Cheng Syu; Wen-Shen Chou; Yung-Chow Peng
- Web page: https://patentgrep.com/patent/US20250094682A1

## CPC

- G06F 30/398: Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36)
- G06F 30/392: Floor-planning or layout, e.g. partitioning or placement
- G06F 30/394: Routing (G06F30/396 takes precedence)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Methods of designing integrated circuits incorporating an analog ECO flow are provided. An example method comprises receiving an initial design and performing an auto-marker process. The auto-marker process comprises performing a first auto-marker process to surround a first plurality of active cells of the design with first computer-aided design (CAD) layers corresponding to a first plurality of engineering change order (ECO) cells, performing an enhanced auto-marker process to cover irregular shapes of the design with second CAD layers corresponding to a second plurality of ECO cells, and performing a second auto-marker process to fill empty areas of the design with third CAD layers corresponding to a third plurality of ECO cells. The method further includes filling the design with the first plurality of ECO cells, the second plurality of ECO cells, and the third plurality of ECO cells.

## Claims

### Claim 1

A method of designing an integrated circuit comprising:
receiving an initial design;
performing an auto-marker process, comprising:
performing a first auto-marker process to surround a first plurality of active cells of the design with first computer-aided design (CAD) layers corresponding to a first plurality of engineering change order (ECO) cells;
performing an enhanced auto-marker process to cover irregular shapes of the design with second CAD layers corresponding to a second plurality of ECO cells;
performing a second auto-marker process to fill empty areas of the design with third CAD layers corresponding to a third plurality of ECO cells; and
filling the design with the first plurality of ECO cells, the second plurality of ECO cells, and the third plurality of ECO cells.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
receiving, from a user, revisions to one of the first CAD layers, second CAD layers, and third CAD layers; and
modifying the design in response to the revisions.

### Claim 3 (depends on 2)

The method of claim 2, further comprising:
receiving, from the user, instructions to add decoupling capacitor (decap) layers corresponding to an ECO decap cell to the design; and
modifying the design in response to the instructions.

### Claim 4 (depends on 3)

The method of claim 3, further comprising:
after modifying the design in response to the instructions, performing a design rule check (DRC) pre-check on the design; and
receiving, from the user, a second set of revisions in response to a failure of the DRC pre-check.

### Claim 5 (depends on 1)

The method of claim 1, further comprising:
performing a design rule check (DRC) pre-check on the initial design, prior to performing the auto-marker process; and
modifying the initial design in response to a failure of the DRC pre-check.

### Claim 6 (depends on 1)

The method of claim 1, wherein the first auto-marker process comprises:
generating first ECO boxes extending, in a first direction, from each of the plurality of active cells;
extending the first ECO boxes in the first direction until a conflict is detected;
generating second ECO boxes extending, in a second direction, from each of the plurality of active cells; and
extending the second ECO boxes in the second direction until a conflict is detected.

### Claim 7 (depends on 1)

The method of claim 1, wherein the second auto-marker process comprises:
(a) determining the presence of an empty region;
(b) detecting all vertex points of the empty region and determining a sequence of the vertex points;
(c) extending a first ECO box from a first vertex point in a first direction and extending a second ECO box from the first vertex point in a second direction;
(d) comparing an area of the first ECO box and the second ECO box;
(e) converting the box having a larger area into an ECO marker; and
(f) repeating steps (c)-(e) for each vertex point.

### Claim 8 (depends on 1)

The method of claim 1, further comprising:
after filling the design with the first plurality of ECO cells, the second plurality of ECO cells, and the third plurality of ECO cells, performing RC extraction and post-layout simulations on the design.

### Claim 9 (depends on 1)

The method of claim 1, wherein the active cells are analog cells.

### Claim 10

A non-transitory computer-readable medium encoded with memory storing instructions for fabricating an integrated circuit, which when executed result in operations comprising:
initiating an auto-marker process to fill-in an initial circuit design with a plurality of ECO cells, thereby forming an updated design;
inserting dummy patterns, wherein the dummy patterns are configured to prevent dishing during fabrication;
performing a final design rule check (DRC);
performing RC-extraction and post-layout simulations; and
causing an integrated circuit to be fabricated from the updated design.

### Claim 11 (depends on 10)

The non-transitory computer-readable medium of claim 10, wherein the initial design comprises a plurality of analog cells.

### Claim 12 (depends on 11)

The non-transitory computer-readable medium of claim 11, wherein the auto-marker process surrounds the plurality of analog cells with the plurality of ECO cells.

### Claim 13 (depends on 10)

The non-transitory computer-readable medium of claim 10, the operations further comprising initiating a corner checking flow configured to reduce DRC error.

### Claim 14 (depends on 10)

The non-transitory computer-readable medium of claim 10, wherein the updated design comprises an ECO fill-in efficiency of greater than 70%.

### Claim 15 (depends on 10)

The non-transitory computer-readable medium of claim 10, the operations further comprising adding at least one ECO decap layer to the initial design.

### Claim 16 (depends on 15)

The non-transitory computer-readable medium of claim 15, wherein the fill-in of the initial design further comprises filling-in the at least one ECO decap layer to form at least one ECO decap cell in the updated design.

### Claim 17 (depends on 10)

The non-transitory computer-readable medium of claim 10, wherein the updated design further comprises a plurality of active cells; and
the plurality of ECO cells are not routed to connect to any of the plurality of active cells in the updated design.

### Claim 18

A computer-implemented system for making a design change to an integrated circuit, comprising:
one or more processors; and
computer-readable memory in communication with the one or more processors and encoded with instructions for commanding the one or more processors to execute steps comprising:
receiving an input design comprising a plurality of active cells;
inserting ECO cells into the design via an analog ECO flow to form an updated design;
fabricating an integrated circuit based on the updated design;
implementing an ECO by routing at least one ECO cell of the updated design to at least one active cell of the updated design, thereby creating a revised design; and
fabricating a revised integrated circuit based on the revised design.

### Claim 19 (depends on 18)

The system of claim 18, wherein at least one active cell of the plurality of active cells comprises an analog cell.

### Claim 20 (depends on 18)

The system of claim 18, wherein the analog ECO flow comprises:
performing an auto-marker process to surround the plurality of active cells with a plurality of ECO cells, wherein the auto-marker process comprises:
generating first ECO boxes extending, in a first direction, from each of the plurality of active cells;
extending the first ECO boxes in the first direction until a conflict is detected;
generating second ECO boxes extending, in a second direction, from each of the plurality of active cells; and
extending the second ECO boxes in the second direction until a conflict is detected.