# US 2025/0094680 A1 · Electronic device supporting manufacture of semiconductor device and operating method of electronic device

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- Number: US 2025/0094680 A1
- Document ID: US20250094680A1
- Status: Published application
- Kind: A1
- Application number: 18/617,946
- Filed: 2024-03-27
- Published: 2025-03-20
- Earliest claimed: 2023-09-19
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Sooyong LEE; Jaeyong JEONG
- Web page: https://patentgrep.com/patent/US20250094680A1

## CPC

- G06F 30/392: Floor-planning or layout, e.g. partitioning or placement
- G06F 30/27: using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
- G06F 30/398: Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36)
- G06F 2119/18: Manufacturability analysis or optimisation for manufacturability
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Disclosed is an operating method of an electronic device which includes a processor and supports manufacture of a semiconductor device. The method includes receiving, at the processor, layout data for the manufacture of the semiconductor device, feature data of the layout data, and skew data after the semiconductor device is manufactured; inferring, at the processor, a center and a distribution of a skew of each of patterns and/or edges of the layout data based on the layout data and the feature data, by using a deep learning module; calculating, at the processor, a loss based on the center and the distribution of the skew based on the skew data, and training, at the processor, the deep learning module based on the loss, and the layout data, the feature data, and the skew data are formatted as tabular data.

## Claims

### Claim 1

An operating method of an electronic device which includes a processor and is configured to support manufacture of a semiconductor device, the method comprising:
receiving, at the processor, layout data associated with the manufacture of the semiconductor device, feature data of the layout data, and skew data obtained after at least one other semiconductor device is manufactured;
inferring, at the processor, a center of a skew and a distribution of the skew of each of patterns and/or edges of the layout data, the inferring based on the layout data and the feature data, by using a deep learning module;
calculating, at the processor, a loss based on the center of the skew and the distribution of the skew, the calculating based on the skew data; and
training, at the processor, the deep learning module based on the loss,
wherein the layout data, the feature data, and the skew data have a tabular format.

### Claim 2 (depends on 1)

The method of claim 1, wherein the feature data include a size of each of the patterns, a size of each of the edges, or both a size of each of patterns and each of the edges.

### Claim 3 (depends on 1)

The method of claim 1, wherein the feature data include a displacement of neighboring patterns, neighboring edges, or both neighboring patterns and neighboring edges for each of the patterns of the layout data, the edges of the layout data, or both the patterns and the edges of the layout data.

### Claim 4 (depends on 1)

The method of claim 1, wherein the feature data include a vector of an influence that neighboring patterns, neighboring edges, or both neighboring patterns and neighboring edges, have on each of the patterns, the edges, or both the patterns and edges of the layout data.

### Claim 5 (depends on 1)

The method of claim 1, wherein the feature data include sizes of patterns and/or edges included in a specific region of the layout data.

### Claim 6 (depends on 1)

The method of claim 1, wherein the feature data include a density of patterns or edges included in a specific region of the layout data.

### Claim 7 (depends on 1)

The method of claim 1, wherein the feature data include a vector of an influence that patterns or edges included in a neighboring region have on a specific region of the layout data.

### Claim 8 (depends on 1)

The method of claim 1, wherein the deep learning module includes a first deep learning module and a second deep learning module, and
wherein the inferring includes:
inferring a first center of the skew by using the first deep learning module; and
inferring a second center of the skew and the distribution of the skew by using the second deep learning module.

### Claim 9 (depends on 8)

The method of claim 8, wherein the calculating of the loss includes,
calculating a first loss based on the first center of the skew and on the skew data, and
wherein the training includes,
training the first deep learning module based on the first loss.

### Claim 10 (depends on 9)

The method of claim 9, wherein the calculating of the loss further includes,
calculating a second loss based on the first center of the skew, the second center of the skew, the distribution of the skew, and the skew data, and
wherein the training further includes,
training the second deep learning module based on the second loss.

### Claim 11 (depends on 10)

The method of claim 10, wherein the second deep learning module is trained based on knowledge distillation of the first center of the skew.

### Claim 12 (depends on 1)

The method of claim 1, further comprising:
receiving, at the processor, second layout data associated with the manufacture of a second semiconductor device and second feature data of the second layout data;
inferring, at the processor, a second center and a second distribution of a second skew of each of patterns of the second layout data, edges of the second layout data, or both patterns and edges of the second layout data, based on the second layout data and the second feature data, by using the deep learning module;
performing, at the processor, Monte Carlo simulation based on the second center of the second skew and on the second distribution of the second skew; and
modifying, at the processor, a layout image corresponding to the layout data based on a result of the Monte Carlo simulation.

### Claim 13

An operating method of an electronic device which includes a processor and is configured to support manufacture of a semiconductor device, the method comprising:
receiving, at the processor, layout data for manufacture of a second semiconductor device and feature data of the layout data;
inferring, at the processor, a center and a distribution of a skew of each of patterns or edges of the layout data based on the layout data and the feature data, by using a deep learning module;
performing, at the processor, Monte Carlo simulation based on the center of the skew and on the distribution of the skew; and
modifying, at the processor, a layout image corresponding to the layout data based on a result of the Monte Carlo simulation,
wherein the deep learning module is trained based on tabular data and on knowledge distillation.

### Claim 14 (depends on 13)

The method of claim 13, further comprising:
transmitting the modified layout image to a manufacture device associated with the manufacture of the semiconductor device.

### Claim 15 (depends on 13)

The method of claim 13, wherein the deep learning module includes a first deep learning module and a second deep learning module, and
wherein the inferring includes:
inferring a first center of the skew based on the layout data and the feature data, by using the first deep learning module; and
inferring a second center of the skew and the distribution of the skew based on the first center, the layout data, and the feature data, by using the second deep learning module.

### Claim 16 (depends on 15)

The method of claim 15, wherein the second deep learning module is trained based on the knowledge distillation such that the second center is close to the first center.

### Claim 17 (depends on 15)

The method of claim 15, further comprising:
setting an upper limit and a lower limit with respect to the result of the Monte Carlo simulation.

### Claim 18 (depends on 15)

The method of claim 15, wherein the first deep learning module includes a TabNet, and
wherein the second deep learning module includes a mixture density network (MDN).

### Claim 19 (depends on 13)

The method of claim 13, wherein the feature data include at least two of:
a size of each of the patterns or the edges;
a displacement of neighboring patterns or edges for each of the patterns or the edges;
a vector of an influence which the neighboring patterns or edges have on each of the patterns or the edges;
sizes of patterns or edges included in a specific region of the layout data;
a density of the patterns or the edges included in the specific region of the layout data; and
a vector of an influence which patterns or edges included in a neighboring region have on the specific region of the layout data.

### Claim 20

An electronic device for manufacture of a semiconductor device, comprising:
a processor; and
a memory configured to store layout data associated with the manufacture of the semiconductor device, feature data of the layout data, and skew data after the semiconductor device is manufactured,
wherein the processor is configured to execute a deep learning module to,
infer a center and a distribution of a skew of each of patterns of the layout data, edges of the layout data, or both patterns and edges of the layout data, based on the layout data and the feature data,
calculate a loss based on the center and the distribution of the skew and the skew data, and
train the deep learning module based on the loss, and
wherein the layout data, the feature data, and the skew data have a tabular format.