# US 2025/0094564 A1 · Secure Exclaves > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2025/0094564 A1 - Document ID: US20250094564A1 - Status: Published application - Kind: A1 - Application number: 18/790,765 - Filed: 2024-07-31 - Published: 2025-03-20 - Earliest claimed: 2023-09-20 - Assignees: Apple Inc. - Applicants: Apple Inc. - Inventors: Peter A. Lisherness; Assaf Menachem; Assaf Metuki; Benjamin Biron; D J Capelis; Husam Khashiboun; Jacques Fortier - Web page: https://patentgrep.com/patent/US20250094564A1 ## CPC - G06F 21/53: by executing in a restricted environment, e.g. sandbox or secure virtual machine - G06F 21/54: by adding security routines or objects to programs - G06F 21/6218: {to a system of files or objects, e.g. local or distributed file system or database} - G06F 21/6245: {Protecting personal data, e.g. for financial or medical purposes} - G06F 21/74: operating in dual or compartmented mode, i.e. at least one secure mode - G06F 2221/033: Test or assess software - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Techniques are disclosed relating to securing hardware accelerators used by a computing device. In some embodiments, a computing device includes a sensor and sensor processor circuitry coupled to the sensor. The sensor processor circuitry is configured to process sensor data received from a sensor of the computing device. In response to a first indication that a first consumer is trustworthy, the sensor processor circuitry is configured to provide a first data set of the processed sensor data to the first consumer. In response to a second indication that a second consumer is untrustworthy, the sensor processor circuitry is configured to negotiate one or more conditions in which the second consumer is permitted to receive a second data set of the processed sensor data. ## Claims ### Claim 1 A computing device, comprising: a sensor; and sensor processor circuitry coupled to the sensor and configured to: process sensor data received from a sensor of the computing device; in response to a first indication that a first consumer is trustworthy, provide a first data set of the processed sensor data to the first consumer; and in response to a second indication that a second consumer is untrustworthy, negotiate one or more conditions in which the second consumer is permitted to receive a second data set of the processed sensor data. ### Claim 2 (depends on 1) The computing device of claim 1, wherein the first indication identifies the first consumer as residing in a secure environment in which a set of security criteria is enforced for the first data set; and wherein the second indication identifies the second consumer as residing outside of the secure environment. ### Claim 3 (depends on 2) The computing device of claim 2, further comprising: one or more processors; and memory having program instructions stored therein that are executable by one or more processors to: implement a secure execution environment of the secure environment, wherein the first consumer is a first process executing within the secure execution environment, and wherein the second consumer is a second process executing external to the secure execution environment. ### Claim 4 (depends on 2) The computing device of claim 2, wherein the sensor processor circuitry includes: one or more configuration registers configured to: store configuration information controlling operation of the sensor, wherein the one or more configuration registers are addressable only by entities within the secure environment. ### Claim 5 (depends on 1) The computing device of claim 1, wherein the sensor processor circuitry is an image signal processor configured to process sensor data received from a camera. ### Claim 6 (depends on 1) The computing device of claim 1, wherein the sensor processor circuitry is an audio processor configured to process sensor data received from a microphone. ### Claim 7 (depends on 1) The computing device of claim 1, wherein the sensor processor circuitry is configured to: provide an indication that the sensor is active, wherein the one or more conditions include the sensor processor circuitry receiving confirmation that a user is being notified that the sensor is active. ### Claim 8 (depends on 7) The computing device of claim 7, further comprising: display pipeline circuitry configured to: in response to the provided indication, insert pixel data in a frame being presented on a display to notify the user is being notified that the sensor is active. ### Claim 9 (depends on 1) The computing device of claim 1, wherein the sensor processor circuitry is configured to: in response to determining to provide the second data set to the second consumer: periodically receive a heartbeat signal indicating that the one or more conditions have been satisfied; and discontinue providing the second data set in response to determining that the heartbeat signal is no longer being received. ### Claim 10 (depends on 1) The computing device of claim 1, wherein the sensor processor circuitry includes: a switch configured to: in response to the one or more conditions being violated, interrupt a data path through which the second data set is being provided to the second consumer. ### Claim 11 (depends on 1) The computing device of claim 1, wherein the sensor processor circuitry is configured to: power gate the sensor in response to determining that the one or more conditions have been violated. ### Claim 12 (depends on 1) The computing device of claim 1, wherein the sensor processor circuitry includes: a secure pipeline configured to: process sensor data to produce the first data set for the first consumer; and an unsecure pipeline configured to: process sensor data to produce the second data set for the second consumer. ### Claim 13 (depends on 12) The computing device of claim 12, wherein the sensor processor circuitry includes: an input-output memory management unit (IOMMU) configured to: store a first set of memory addresses designated as being accessible to the secure pipeline and a second set of memory addresses designated as being accessible to the unsecure pipeline; and restrict the secure pipeline from accessing memory addresses outside of the first set and the unsecure pipeline from accessing memory addresses outside of the second set. ### Claim 14 (depends on 13) The computing device of claim 13, wherein the memory addresses are stored as virtual to physical address translations. ### Claim 15 (depends on 1) The computing device of claim 1, wherein the sensor processor circuitry includes: a first direct memory access (DMA) engine configured to write the first data set to a portion of memory accessible to the first consumer; and a second DMA engine configured to write the second data to another portion of memory accessible to the second consumer. ### Claim 16 A method, comprising: processing, by sensor processor circuitry of a computing device, sensor data received from a sensor of the computing device; in response to a first indication that a first consumer resides in a secure environment, the sensor processor circuitry providing a first data set of the processed sensor data to the first consumer; and in response to a second indication that a second consumer resides outside of the secure environment, the sensor processor circuitry negotiating one or more conditions in which the second consumer is permitted to receive a second data set of the processed sensor data. ### Claim 17 (depends on 16) The method of claim 16, wherein the negotiated one or more conditions includes a condition that a user is notified about the sensor's use. ### Claim 18 An integrated circuit, comprising: one or more processors configured to: co-execute trusted processes and untrusted processes in an isolated manner that includes enforcing a set of security criteria; and sensor processor circuitry configured to: process sensor data received from a sensor; in response to a first indication that a first process is one of the trusted processes, provide a first data set of the processed sensor data to the first process; and in response to a second indication that a second process is one of the untrusted processes, restrict, based on one or more of the set of security criteria, access of the second process to a second data set of the processed sensor data. ### Claim 19 (depends on 18) The integrated circuit of claim 18, wherein the sensor processor circuitry includes: a secure pipeline configured to: process sensor data to produce the first data set for the first process; and an input-output memory management unit (IOMMU) configured to: store a set of memory addresses designated as being accessible to the secure pipeline; and restrict the secure pipeline from accessing memory addresses outside of the set. ### Claim 20 (depends on 18) The integrated circuit of claim 18, further comprising: user interface pipeline circuitry configured to: insert, into an output provided to a user interface, an indicator that the sensor is active; and wherein the sensor processor circuitry is configured to: based on the indicator satisfying one or more of the set of security criteria, grant the second process access to the second data set of the processed sensor data.