Memory device and control method for performing row hammer protection
AssigneeNanya Technology Corporation
InventorsWilliam Wu Shen, Chung Hsun Lee
Life of this patent
Estimating the term…
Abstract
A memory device and a control method of the memory device are provided. The control method includes: providing access count values to memory rows of the memory device respectively when the memory row are accessed; performing a refresh operation on the memory rows sequentially and resetting the access count values sequentially in response to a refresh command; receiving an interrupt command to interrupt the refresh operation, wherein the refresh operation is interrupted when performing on an interrupt memory row; completing the refresh operation on the interrupt memory row; and recharging at least one adjacent memory row next to the interrupt memory row.
Claims13
A control method for performing row hammer protection of a memory device, wherein the memory device comprises a plurality of memory rows, wherein the control method comprises:
- providing a plurality of access count values to the plurality of memory rows respectively when the plurality of memory rows are accessed;
- performing a refresh operation on the plurality of memory rows sequentially and resetting the plurality of access count values sequentially in response to a refresh command;
- receiving an interrupt command to interrupt the refresh operation, wherein the refresh operation is interrupted when performing on an interrupt memory row;
- completing the refresh operation on the interrupt memory row;
- and
- recharging at least one adjacent memory row next to the interrupt memory row.
A memory device, comprising:
- a memory array, comprising a plurality of memory rows;
- and
- a control circuit, coupled to the memory array, and configured to:
- provide a plurality of access count values to the plurality of memory rows respectively when the plurality of memory rows are accessed;
- perform a refresh operation on the plurality of memory rows sequentially and resets the plurality of access count values sequentially in response to a refresh command;
- receive an interrupt command to interrupt the refresh operation, wherein the refresh operation is interrupted when performing on an interrupt memory row;
- complete the refresh operation on the interrupt memory row;
- and
- recharge at least one adjacent memory row next to the interrupt memory row.
Dependencies are inferred from the claim text.