# US 2025/0093933 A1 · Information processing apparatus and method performed thereby > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2025/0093933 A1 - Document ID: US20250093933A1 - Status: Published application - Kind: A1 - Application number: 18/660,203 - Filed: 2024-05-09 - Published: 2025-03-20 - Earliest claimed: 2023-09-15 - Assignees: Toshiba Tec Kabushiki Kaisha - Applicants: Toshiba Tec Kabushiki Kaisha - Inventors: Takumi TAKAHASHI - Web page: https://patentgrep.com/patent/US20250093933A1 ## CPC - G06F 1/30: Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations (for resetting only G06F1/24) - G06F 1/263: {Arrangements for using multiple switchable power supplies, e.g. battery and AC (G06F1/30 takes precedence)} - H02J 9/061: {for DC powered loads} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H02J: ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY ## Abstract An information processing apparatus connectable to a UPS, includes motherboards, a first circuit connected to the motherboards to receive first signals therefrom, each first signal indicating whether the corresponding motherboard is operating, a second circuit connected to the motherboards to receive second signals therefrom, each second signal indicating whether power is to be supplied from the UPS to the corresponding motherboard during a power outage, a third circuit for detecting a power outage, and a fourth circuit connected to the first through third circuits. In response to the outage, the fourth circuit supplies power from the UPS to the motherboards when the first and second circuits each receive from at least one motherboard, the first signal indicating that the corresponding motherboard is operating and the second signal indicating that power is to be supplied from the UPS to the corresponding motherboard during a power outage. ## Claims ### Claim 1 An information processing apparatus connectable to an uninterruptible power supply (UPS), comprising: a plurality of motherboards; a first circuit connected to the motherboards to receive respective first signals from the motherboards, each of the first signals indicating whether the corresponding motherboard is operating; a second circuit connected to the motherboards to receive respective second signals from the motherboards, each of the second signals indicating whether power is to be supplied from the UPS to the corresponding motherboard during a power outage; a third circuit for detecting a power outage; and a fourth circuit connected to the first through third circuits, wherein in response to the power outage detected by the third circuit, the fourth circuit supplies power from the UPS to the motherboards when the first and second circuits each receive from at least one of the motherboards, the first signal indicating that the corresponding motherboard is operating and the second signal indicating that power is to be supplied from the UPS to the corresponding motherboard during a power outage. ### Claim 2 (depends on 1) The information processing apparatus according to claim 1, wherein each of the motherboards includes a power supply circuit that supplies external power to the corresponding motherboard and that is configured to output the first signal to the first circuit. ### Claim 3 (depends on 2) The information processing apparatus according to claim 2, wherein each of the motherboards includes a microcomputer that stores a setting indicating whether power is to be supplied from the UPS to the corresponding motherboard during a power outage and that is configured to output the second signal to the second circuit. ### Claim 4 (depends on 3) The information processing apparatus according to claim 3, wherein each of the first signals is of a low level indicating that the corresponding motherboard is not operating or a high level indicating that the corresponding motherboard is operating. ### Claim 5 (depends on 4) The information processing apparatus according to claim 4, wherein each of the second signals is of a low level indicating that power is to be supplied from the UPS to the corresponding motherboard in a power outage and a high level indicating that power is not to be supplied from the UPS to the corresponding motherboard in a power outage. ### Claim 6 (depends on 5) The information processing apparatus according to claim 5, further comprising: a fifth circuit directly connected to the first and third circuits; and a sixth circuit directly connected to the fourth and fifth circuits, wherein the first circuit is an OR circuit, the second circuit is an AND circuit, upon receipt of a third signal indicating the power outage from the third circuit, the fifth circuit outputs the third signal to the sixth circuit when a signal that is output from the OR circuit is a high level, and upon receipt of the third signal from the fifth circuit, the sixth circuit outputs the third signal to the fourth circuit when a signal that is output from the AND circuit is a low level. ### Claim 7 (depends on 6) The information processing apparatus according to claim 6, wherein each of the fifth and sixth circuits includes a three-state buffer. ### Claim 8 (depends on 6) The information processing apparatus according to claim 6, further comprising: a base board between the motherboards and the UPS and on which the first through sixth circuits are disposed. ### Claim 9 (depends on 8) The information processing apparatus according to claim 8, further comprising: a first conversion circuit connected to the third circuit on the base board and by which a first direct voltage for operating the base board is generated. ### Claim 10 (depends on 9) The information processing apparatus according to claim 9, further comprising: a second conversion circuit connectable to an external power source, wherein the second conversion circuit converts an alternating voltage applied by the external power source to a second direct voltage to be applied to the first conversion circuit. ### Claim 11 A method performed by an information processing apparatus having an uninterruptible power supply (UPS), the method comprising: detecting a power outage; acquiring a plurality of first signals from a plurality of motherboards, each of the first signals indicating whether the corresponding motherboard is operating; acquiring a plurality of second signals from the motherboards, each of the second signals indicating whether power is to be supplied from the UPS to the corresponding motherboard during a power outage; and determining that the first signal indicating that the corresponding motherboard is operating and the second signal indicating that power is to be supplied from the UPS to the corresponding motherboard during a power outage, are acquired, and then supplying power from the UPS to the motherboards. ### Claim 12 (depends on 11) The method according to claim 11, wherein acquiring a plurality of first signals includes outputting the first signals from a plurality of power supply circuits respectively included in the motherboards. ### Claim 13 (depends on 12) The method according to claim 12, wherein acquiring a plurality of second signals includes outputting the second signals from a plurality of microcomputers respectively included in the motherboards. ### Claim 14 (depends on 13) The method according to claim 13, wherein each of the first signals is of a low level indicating that the corresponding motherboard is not operating or a high level indicating that the corresponding motherboard is operating. ### Claim 15 (depends on 14) The method according to claim 14, wherein each of the second signals is of a low level indicating that power is to be supplied from the UPS to the corresponding motherboard in a power outage and a high level indicating that power is not to be supplied from the UPS to the corresponding motherboard in a power outage. ### Claim 16 An information processing apparatus comprising: an uninterruptible power supply (UPS); a plurality of motherboards; a first circuit connected to the motherboards to receive respective first signals from the motherboards, each of the first signals indicating whether the corresponding motherboard is operating; a second circuit connected to the motherboards to receive respective second signals from the motherboards, each of the second signals indicating whether power is to be supplied from the UPS to the corresponding motherboard during a power outage; a third circuit for detecting a power outage; and a fourth circuit connected to the first through third circuits, wherein in response to the power outage detected by the third circuit, the fourth circuit supplies power from the UPS to the motherboards when the first and second circuits each receive from at least one of the motherboards, the first signal indicating that the corresponding motherboard is operating and the second signal indicating that power is to be supplied from the UPS to the corresponding motherboard during a power outage. ### Claim 17 (depends on 16) The information processing apparatus according to claim 16, wherein each of the motherboards includes a power supply circuit that supplies external power to the corresponding motherboard and that is configured to output the first signal to the first circuit. ### Claim 18 (depends on 17) The information processing apparatus according to claim 17, wherein each of the motherboards includes a microcomputer that stores a setting indicating whether power is to be supplied from the UPS to the corresponding motherboard during a power outage and that is configured to output the second signal to the second circuit. ### Claim 19 (depends on 18) The information processing apparatus according to claim 18, wherein each of the first signals is of a low level indicating that the corresponding motherboard is not operating or a high level indicating that the corresponding motherboard is operating. ### Claim 20 (depends on 19) The information processing apparatus according to claim 19, wherein each of the second signals is of a low level indicating that power is to be supplied from the UPS to the corresponding motherboard in a power outage and a high level indicating that power is not to be supplied from the UPS to the corresponding motherboard in a power outage.