# US 2025/0086009 A1 · Provisioning of performance states for central processing units (cpus)

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- Number: US 2025/0086009 A1
- Document ID: US20250086009A1
- Status: Published application
- Kind: A1
- Application number: 18/367,710
- Filed: 2023-09-13
- Published: 2025-03-13
- Earliest claimed: 2023-09-13
- Assignees: Apple Inc.
- Applicants: Apple Inc.
- Inventors: Ronit BANERJEE; Karthic A. PALANIAPPAN; Bryan R. HINCH; John G. DORSEY
- Web page: https://patentgrep.com/patent/US20250086009A1

## CPC

- G06F 9/4887: {involving deadlines, e.g. rate based, periodic}
- G06F 11/3409: {for performance assessment}
- G06F 1/3203: Power management, i.e. event-based initiation of a power-saving mode
- G06F 1/3234: Power saving characterised by the action undertaken
- G06F 9/4893: {taking into account power or heat criteria (power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206)}
- G06F 9/5044: {considering hardware capabilities}
- G06F 9/505: {considering the load}
- G06F 9/5094: {where the allocation takes into account power or heat criteria (power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206)}
- G06F 11/3058: {Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations (thermal management in cooling arrangements of a computing system G06F1/206)}
- G06F 11/3419: {by assessing time}
- G06F 11/3428: {Benchmarking}
- G06F 11/3433: {for load management (allocation of a server based on load conditions G06F9/505; load rebalancing G06F9/5083; redistributing the load in a network by a load balancer H04L67/1029)}
- G06F 1/324: by lowering clock frequency
- G06F 2201/805: Real-time
- G06F 2201/845: Systems in which the redundancy can be transformed in increased performance
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Systems, methods, and apparatuses disclosed herein can operate in different performance states that provide different energy performance tradeoffs and, in some embodiments, can dynamically switch between these different performance states. These systems, methods, and apparatuses can estimate specific timeframes that workloads are to be completed. These systems, methods, and apparatuses can identify one or more processes that are being executed to perform the workloads. These systems, methods, and apparatuses can dynamically provision one or more performance states from among these different performance states to execute the process to complete the workloads within the specific timeframes. These systems, methods, and apparatuses can dynamically provision the one or more performance states for the one or more process that optimizes power consumption and/or performance while completing the workloads within the specific timeframes.

## Claims

### Claim 1

A method for operating a Central Processing Unit (CPU), the method comprising:
estimating, by the CPU, a plurality of specific timeframes that a plurality of workloads are to be completed to determine a plurality of workload completion windows;
identifying, by the CPU, a process that is performing the plurality of workloads from among a plurality of processes that are being executed by the CPU over the plurality of workload completion windows;
provisioning, by the CPU, a performance state from among a plurality of different performance states to execute the process to complete the plurality of workloads within the plurality of workload completion windows;
determining, by the CPU, whether the plurality of workloads being performed by the process are a plurality of deadline-bound workloads; and
executing, by the CPU based on determining the plurality of workloads are the deadline-bound workloads, the plurality of workloads in accordance with the performance state.

### Claim 2 (depends on 1)

The method of claim 1, wherein the estimating comprises identifying the plurality of specific timeframes that coincide with swapping between a visible buffer and a working buffer within a frame buffer of a Graphics Processing Unit (GPU).

### Claim 3 (depends on 1)

The method of claim 1, wherein the identifying comprises:
identifying a plurality of candidate processes from among the plurality of processes that are representative of the plurality of deadline-bound workloads over the plurality of workload completion windows;
estimating a plurality of workloads completed by the plurality of candidate processes over the plurality of workload completion windows;
statistically measuring a plurality of variances of the plurality of workloads completed by the plurality of candidate processes over the plurality of workload completion windows; and
identifying the process as being a candidate process from among the plurality of candidate processes having a lowest variance from among the plurality of variances.

### Claim 4 (depends on 1)

The method of claim 1, wherein the provisioning comprises provisioning the performance state that optimizes power consumption or performance of the CPU while completing the plurality of workloads within the plurality of workload completion windows.

### Claim 5 (depends on 4)

The method of claim 4, wherein the provisioning comprises provisioning the performance state that optimizes power consumption or performance of the CPU while completing the plurality of workloads within the plurality of workload completion windows less a deadline margin.

### Claim 6 (depends on 1)

The method of claim 1, further comprising:
switching, by the CPU in response to detecting a compute-bound workload, from the performance state to a utilization-based control for the process to perform the compute-bound workload; and
executing, by the CPU, the compute-bound workload in accordance with the utilization-based control.

### Claim 7 (depends on 6)

The method of claim 6, further comprising provisioning the performance state to execute the process to complete the plurality of workloads within the plurality of workload completion windows in response to completing the compute-bound workload.

### Claim 8

A computing device, comprising:
a Graphics Processing Unit (GPU) having a visible buffer to store a visible video frame that is being displayed and a working buffer to store a working video frame that is currently being prepared for display by the GPU, the GPU being configured to swap the visible buffer and the working buffer at a plurality of specific timeframes in response to the working video frame being completed; and
a Central Processing Unit (CPU) configured to:
estimate the plurality of specific timeframes that a plurality of workloads are to be completed to determine a plurality of workload completion windows,
identify a process that is performing the plurality of workloads from among a plurality of processes that are being executed by the CPU over the plurality of workload completion windows,
provision a performance state from among a plurality of different performance states to execute the process to complete the plurality of workloads within the plurality of workload completion windows,
determine whether the plurality of workloads being performed by the process are a plurality of deadline-bound workloads, and
execute, based on determining the plurality of workloads are the deadline-bound workloads, the plurality of workloads in accordance with the performance state.

### Claim 9 (depends on 8)

The computing device of claim 8, wherein the CPU is configured to identify the plurality of specific timeframes that coincide with swapping between the visible buffer and the working buffer.

### Claim 10 (depends on 8)

The computing device of claim 8, wherein the CPU is configured to:
identify a plurality of candidate processes from among the plurality of processes that are representative of the plurality of deadline-bound workloads over the plurality of workload completion windows;
estimate a plurality of workloads completed by the plurality of candidate processes over the plurality of workload completion windows;
statistically measure a plurality of variances of the plurality of workloads completed by the plurality of candidate processes over the plurality of workload completion windows; and
identify the process as being a candidate process from among the plurality of candidate processes having a lowest variance from among the plurality of variances.

### Claim 11 (depends on 8)

The computing device of claim 8, wherein the CPU is configured to provision the performance state that optimizes power consumption or performance of the CPU while completing the plurality of workloads within the plurality of workload completion windows.

### Claim 12 (depends on 11)

The computing device of claim 11, wherein the CPU is configured to provision the performance state that optimizes power consumption or performance of the CPU while completing the plurality of workloads within the plurality of workload completion windows less a deadline margin.

### Claim 13 (depends on 8)

The computing device of claim 8, wherein the CPU is further configured to:
switching, in response to detecting a compute-bound workload, from the performance state to a utilization-based control for the process to perform the compute-bound workload; and
executing the compute-bound workload in accordance with the utilization-based control.

### Claim 14 (depends on 13)

The computing device of claim 13, wherein the CPU is further configured to provision the performance state to execute the process to complete the plurality of workloads within the plurality of workload completion windows in response to completing the compute-bound workload.

### Claim 15

A System on Chip (SoC), comprising:
a Graphics Processing Unit (GPU);
a memory; and
a Central Processing Unit (CPU) configured to:
estimate a plurality of specific timeframes that a plurality of workloads are to be completed to determine a plurality of workload completion windows,
identify a process that is performing the plurality of workloads from among a plurality of processes that are being executed by the CPU over the plurality of workload completion windows,
provision a performance state from among a plurality of different performance states to execute the process to complete the plurality of workloads within the plurality of workload completion windows,
determine whether the plurality of workloads being performed by the process are a plurality of deadline-bound workloads, and
execute, based on determining the plurality of workloads are the deadline-bound workloads, the plurality of workloads in accordance with the performance state.

### Claim 16 (depends on 8)

The SoC of claim 8, wherein the CPU is configured to identify the plurality of specific timeframes that coincide with swapping between a visible buffer and a working buffer within a frame buffer of the GPU.

### Claim 17 (depends on 8)

The SoC of claim 8, wherein the CPU is configured to:
identify a plurality of candidate processes from among the plurality of processes that are representative of the plurality of deadline-bound workloads over the plurality of workload completion windows;
estimate a plurality of workloads completed by the plurality of candidate processes over the plurality of workload completion windows;
statistically measure a plurality of variances of the plurality of workloads completed by the plurality of candidate processes over the plurality of workload completion windows; and
identify the process as being a candidate process from among the plurality of candidate processes having a lowest variance from among the plurality of variances.

### Claim 18 (depends on 17)

The SoC of claim 17, wherein the CPU is configured to provision the performance state that optimizes power consumption or performance of the CPU while completing the plurality of workloads within the plurality of workload completion windows less a deadline margin.

### Claim 19 (depends on 8)

The SoC of claim 8, wherein the CPU is further configured to:
switching, in response to detecting a compute-bound workload, from the performance state to a utilization-based control for the process to perform the compute-bound workload; and
executing the compute-bound workload in accordance with the utilization-based control.

### Claim 20 (depends on 19)

The SoC of claim 19, wherein the CPU is further configured to provision the performance state to execute the process to complete the plurality of workloads within the plurality of workload completion windows in response to completing the compute-bound workload.
