# US 2025/0085336 A1 · Correction system and method for semiconductor circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2025/0085336 A1 - Document ID: US20250085336A1 - Status: Published application - Kind: A1 - Application number: 18/671,982 - Filed: 2024-05-22 - Published: 2025-03-13 - Earliest claimed: 2023-09-12 - Assignees: Realtek Semiconductor Corp. - Applicants: Realtek Semiconductor Corporation - Inventors: Li-Lung KAO; Chia-Chi TSAI; Pei-Chun LIAO; Kai-Yi HUANG; Sin Hua WU - Web page: https://patentgrep.com/patent/US20250085336A1 ## CPC - G01R 31/2884: {using dedicated test connectors, test elements or test circuits on the IC under test (G01R31/2855 takes precedence)} - H03K 17/165: {by feedback from the output circuit to the control circuit} - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract The present disclosure provides a correction system and method for correcting a semiconductor circuit. The correction system includes a plurality of redundant circuit units, a plurality of switching circuit units and a control circuit. The redundant circuit units are coupled to the semiconductor circuit. The switching circuit units are coupled to the redundant circuit units and a plurality of basic circuit units of the semiconductor circuit. The control circuit is coupled to the semiconductor circuit and the switching circuit units, is configured to obtain a noise signal of the semiconductor circuit, is configured to determine whether the semiconductor circuit passes a noise test by recognizing a characteristic of the noise signal, and is configured to replace one of the basic circuit units with one of the redundant circuit units by controlling the switching circuit units when the semiconductor circuit does not pass the noise test. ## Claims ### Claim 1 A correction system, configured to correct a semiconductor circuit, and comprising: a plurality of redundant circuit units, coupled to the semiconductor circuit; a plurality of switching circuit units, coupled to the plurality of redundant circuit units and a plurality of basic circuit units of the semiconductor circuit; and a control circuit, coupled to the semiconductor circuit and the plurality of switching circuit units, configured to obtain a noise signal of the semiconductor circuit, configured to determine whether the semiconductor circuit passes a noise test by recognizing a characteristic of the noise signal, and configured to replace one of the plurality of basic circuit units with one of the plurality of redundant circuit units by controlling the plurality of switching circuit units when the semiconductor circuit does not pass the noise test. ### Claim 2 (depends on 1) The correction system of claim 1, wherein the control circuit is further configured to obtain another noise signal of the semiconductor circuit when the semiconductor circuit is operated with the one of the plurality of redundant circuit units and others of the plurality of basic circuit units, and is configured to determine whether the semiconductor circuit passes the noise test by recognizing a characteristic of the another noise signal. ### Claim 3 (depends on 1) The correction system of claim 1, wherein the noise signal is obtained by the control circuit when the semiconductor circuit is operated with the plurality of basic circuit units. ### Claim 4 (depends on 1) The correction system of claim 1, wherein the control circuit is further configured to determine that the semiconductor circuit does not pass the noise test when the characteristic of the noise signal comprises a characteristic of random telegraph noise. ### Claim 5 (depends on 4) The correction system of claim 4, wherein the control circuit is further configured to determine that the semiconductor circuit passes the noise test when the characteristic of the noise signal does not comprise the characteristic of random telegraph noise. ### Claim 6 (depends on 1) The correction system of claim 1, wherein the control circuit is further configured to receive and process a signal of the semiconductor circuit to obtain the noise signal. ### Claim 7 (depends on 6) The correction system of claim 6, wherein the semiconductor circuit comprises a first stage circuit and an output stage circuit, an output terminal of the first stage circuit is coupled to an input terminal of the output stage circuit, an output terminal of the output stage circuit is coupled to an inverting input terminal of the first stage circuit, and the plurality of switching circuit units, the plurality of basic circuit units and the plurality of redundant circuit units are all arranged on the first stage circuit. ### Claim 8 (depends on 7) The correction system of claim 7, wherein a non-inverting input terminal of the first stage circuit is coupled to an input signal, and the signal is an output signal generated by the semiconductor circuit according to the input signal. ### Claim 9 (depends on 7) The correction system of claim 7, wherein a first resistor is coupled between the inverting input terminal and an input signal, a second resistor is coupled between the inverting input terminal and the output terminal of the output stage circuit, a non-inverting input terminal of the first stage circuit is coupled to a reference signal, and the signal is an output signal generated by the semiconductor circuit according to the input signal. ### Claim 10 (depends on 7) The correction system of claim 7, wherein a first resistor is coupled between the inverting input terminal and an input signal, a second resistor is coupled between the inverting input terminal and the output terminal of the first stage circuit, a non-inverting input terminal of the first stage circuit is coupled to a reference signal, and the signal is a signal generated by the first stage circuit according to the input signal. ### Claim 11 (depends on 7) The correction system of claim 7, wherein the semiconductor circuit further comprises a second stage circuit, and the second stage circuit is coupled between the output terminal of the first stage circuit and the input terminal of the output stage circuit. ### Claim 12 (depends on 11) The correction system of claim 11, wherein a non-inverting input terminal of the first stage circuit is coupled to an input signal, and the signal is an output signal generated by the semiconductor circuit according to the input signal. ### Claim 13 (depends on 11) The correction system of claim 11, wherein a first resistor is coupled between the inverting input terminal and an input signal, a second resistor is coupled between the inverting input terminal and the output terminal of the output stage circuit, a non-inverting input terminal of the first stage circuit is coupled to a reference signal, and the signal is an output signal generated by the semiconductor circuit according to the input signal. ### Claim 14 (depends on 7) The correction system of claim 7, wherein the one of the plurality of basic circuit units is coupled to a plurality of bias signals and the input terminal of the output stage circuit through one of the plurality of switching circuit units, the one of the plurality of redundant circuit units is coupled to the plurality of bias signals and the input terminal of the output stage circuit through another one of the plurality of switching circuit units, and the control circuit is configured to switch the one of the plurality of switching circuit units to an OFF state, and is configured to switch the another one of the plurality of switching circuit units to an ON state, so that the one of the plurality of basic circuit units is replaced by the one of the plurality of redundant circuit units. ### Claim 15 (depends on 1) The correction system of claim 1, wherein an amount of the plurality of redundant circuit units is less than an amount of the plurality of basic circuit units, and an amount of the plurality of switching circuit units is equal to a sum of the amount of the plurality of redundant circuit units and the amount of the plurality of basic circuit units. ### Claim 16 A correction method, configured to correct a semiconductor circuit, wherein the semiconductor circuit comprises a plurality of basic circuit units, a plurality of redundant circuit units is coupled to the semiconductor circuit, a plurality of switching circuit units is coupled to the plurality of basic circuit units and the plurality of redundant circuit units, and the correction method comprises: obtaining a noise signal of the semiconductor circuit; determining whether the semiconductor circuit passes a noise test by recognizing a characteristic of the noise signal; and replacing one of the plurality of basic circuit units with one of the plurality of redundant circuit units by controlling the plurality of switching circuit units when the semiconductor circuit does not pass the noise test. ### Claim 17 (depends on 16) The correction method of claim 16, further comprising: obtaining another noise signal of the semiconductor circuit when the semiconductor circuit is operated with the one of the plurality of redundant circuit units and others of the plurality of basic circuit units; and determining whether the semiconductor circuit passes the noise test by recognizing a characteristic of the another noise signal. ### Claim 18 (depends on 16) The correction method of claim 16, wherein the noise signal is obtained when the semiconductor circuit is operated with the plurality of basic circuit units. ### Claim 19 (depends on 16) The correction method of claim 16, wherein it is determined that the semiconductor circuit does not pass the noise test when the characteristic of the noise signal comprises a characteristic of random telegraph noise. ### Claim 20 (depends on 19) The correction method of claim 19, wherein it is determined that the semiconductor circuit passes the noise test when the characteristic of the noise signal does not comprise the characteristic of random telegraph noise.