Wrap around backside contact for s/d with backside trench epi and bspdn

A microelectronic structure comprising:

• a nanosheet transistor that includes a first source/drain and a second source/drain;
• a bottom dielectric isolation layer located on a backside surface of the first source/drain;
• a trench epi extending from a backside surface of the first source/drain, wherein the trench epi extends through the bottom dielectric layer;
• and
• a backside contact that wraps around the trench epi and is in contact with a backside surface of the first source/drain.

A method comprising:

• forming a nanosheet transistor that includes a first source/drain and a second source/drain;
• flipping the nanosheet transistor over for backside processing;
• forming a first backside interlayer dielectric layer and forming a second backside interlayer dielectric layer;
• forming a trench to expose the backside surface of the first source/drain;
• forming a sacrificial liner on the sidewalls of the trench;
• growing a trench epi from the backside surface of the first source/drain, wherein the sacrificial liner acts a retaining wall for the trench epi growth;
• removing the sacrificial liner;
• and
• forming a backside contact that wraps around the trench epi and is in contact with the backside surface of the first source/drain.