Power-efficient mixed-signal circuit including analog multiply and accumulate engines

A computer-implemented method of multiplying first and second input vectors, each of the vectors having M integer values, the method comprising:

• splitting values of the first input vector into first coarse value vectors and first fine value vectors;
• splitting values of the second input vector into second coarse value vectors and second fine value vectors;
• using a plurality of analog multiply and accumulate (MAC) units to generate a first analog signal representing a dot product of the first and second coarse value vectors, a second analog signal representing a dot product of the first coarse and second fine value vectors, a third analog signal representing a dot product of the first fine and second coarse value vectors, and a fourth analog signal representing a dot produce of the first and second fine value vectors;
• and
• performing analog-to-digital (A/D) conversion on and combining the first, second, third and fourth analog signals to produce a digital output signal representing a dot product of the first and second input vectors.

A computing device for running a neural network, the device comprising:

• a plurality of switched capacitor units configured to perform matrix multiplication on an input vector and a weight vector, each switched capacitor unit configured to:
• split values of an input vector into first coarse value vectors and first fine value vectors;
• split values of a weight vector into second coarse value vectors and second fine value vectors;
• perform analog multiply and accumulate (MAC) operations to take a first dot product of the first and second coarse value vectors, a second dot product of the first coarse and second fine value vectors, a third dot product of the first fine and second coarse value vectors, and a fourth dot produce of the first and second fine value vectors;
• and
• perform analog-to-digital (A/D) conversion on and combine the first, second, third and fourth dot products to produce a reconstructed digital signal;
• and
• a digital processor programmed to apply activation functions to outputs of the switched capacitor units.