Buried lines and related fabrication techniques
AssigneeMicron Technology, Inc.
InventorsHernan Castro, Stephen W. Russell, Stephen H. Tang
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Abstract
Methods, systems, and devices for buried lines and related fabrication techniques are described. An electronic device (e.g., an integrated circuit) may include multiple buried lines at multiple layers of a stack. For example, a first layer of the stack may include multiple buried lines formed based on a pattern of vias formed at an upper layer of the stack. The pattern of vias may be formed in a wide variety of spatial configurations, and may allow for conductive material to be deposited at a buried target layer. In some cases, buried lines may be formed at multiple layers of the stack concurrently.
Claims21
(canceled)
A method, comprising:
- forming a stack, the stack comprising a first dielectric material at a plurality of first layers;
- forming a first set of vias;
- forming a plurality of first channels, each first channel disposed in the first dielectric material at a respective first layer and aligned with the first set of vias;
- and
- forming a plurality of first electrodes, each first electrode at a respective first layer, wherein forming the plurality of first electrodes comprises filling the plurality of first channels with an electrode material.
A method, comprising:
- forming a stack, the stack comprising a first dielectric material at a plurality of first layers;
- forming a first set of vias in a top layer of the stack;
- forming a first set of via holes in the stack using the first set of vias, wherein the first set of via holes extend through the plurality of first layers;
- forming, by removing a portion of the first dielectric material from a respective first layer using the first set of via holes, a plurality of first channels, each first channel disposed in the first dielectric material at the respective first layer and aligned with the first set of vias and the first set of via holes;
- and
- forming a plurality of first electrodes, each first electrode at a respective first layer, wherein forming the plurality of first electrodes comprises filling the plurality of first channels with an electrode material.
An apparatus, formed by a process of:
- forming a stack, the stack comprising a first dielectric material at a plurality of first layers;
- forming a first set of vias;
- forming a plurality of first channels, each first channel disposed in the first dielectric material at a respective first layer and aligned with the first set of vias;
- and
- forming a plurality of first electrodes, each first electrode at a respective first layer, wherein forming the plurality of first electrodes comprises filling the plurality of first channels with an electrode material.
Dependencies are inferred from the claim text.