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US 2025/0063807 A1Published application
Semiconductor device and methods of manufacturing
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHung-Yao Chen, Pin-Chu Liang, Hsueh-Chang Sung, Pei-Ren Jeng, Yee-Chia Yeo
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Abstract
In an embodiment, a method includes forming a first fin and a second fin within an insulation material over a substrate, the first fin and the second fin includes different materials, the insulation material being interposed between the first fin and the second fin, the first fin having a first width and the second fin having a second width; forming a first capping layer over the first fin; and forming a second capping layer over the second fin, the first capping layer having a first thickness, the second capping layer having a second thickness different from the first thickness.
Claims20
A method comprising:
- forming a silicon fin over a substrate;
- forming a silicon-germanium fin over the substrate;
- trimming the silicon fin and the silicon-germanium fin;
- forming a first capping layer over the silicon fin and a second capping layer over the silicon-germanium fin;
- forming a first dielectric layer over the silicon fin and a second dielectric layer over the silicon-germanium fin, the forming the first dielectric layer and the second dielectric layer further comprising:
- converting the first capping layer to a first intermediate layer;
- and
- converting a portion of the second capping layer to a second intermediate layer, wherein after the converting, an unconverted portion of the second capping layer remains contacting the silicon-germanium fin;
- and
- forming a first gate structure over the silicon fin and a second gate structure over the silicon-germanium fin.
7 more elements
A method, comprising:
- forming a structure comprising a plurality of fins within a dielectric material over a substrate, the plurality of fins comprising:
- a first fin;
- a first dummy fin, the first fin and the first dummy fin being separated by a first opening, a first upper portion of the first opening having a first lateral distance;
- a second fin;
- and
- a second dummy fin, the second fin and the second dummy fin being separated by a second opening, a second upper portion of the second opening having a second lateral distance;
- forming isolation regions from the dielectric material between each of the plurality of fins;
- performing a treatment on the plurality of fins to expand the first opening and the second opening, wherein after performing the treatment:
- the first opening has a third lateral distance greater than the first lateral distance;
- and
- the second opening has a fourth lateral distance greater than the second lateral distance;
- forming a first capping layer over the first fin and a second capping layer over the second fin, wherein after forming the first capping layer and the second capping layer:
- the first opening has a fifth lateral distance lesser than the third lateral distance;
- and
- the second opening has a sixth lateral distance lesser than the fourth lateral distance;
- forming a plurality of dielectric layers, the plurality of dielectric layers comprising:
- a first dielectric layer over the first capping layer;
- a first dummy dielectric layer over the first dummy fin, the first opening having a seventh lateral distance lesser than the fifth lateral distance;
- a second dielectric layer over the second capping layer;
- and
- a second dummy dielectric layer over the second dummy fin, the second opening having an eighth distance lesser than the sixth lateral distance, wherein a first width measured from the first opening to the first fin is greater than a first dummy width measured from the first opening to the first dummy fin;
- and
- forming gate structures over the first fin and the second fin.
20 more elements
A method, comprising:
- forming a silicon fin and a silicon-germanium fin over a substrate;
- forming an isolation region over the substrate and interposed between the silicon fin and the silicon-germanium fin;
- forming a dielectric fin in the isolation region and over the substrate, wherein a first protrusion of the silicon fin, a second protrusion of the silicon-germanium fin, and a third protrusion of the dielectric fin protrude above an upper surface of the isolation region, and wherein a first lateral width of the first protrusion is substantially equal to a second lateral width of the second protrusion;
- depositing a first semiconductor layer over the silicon fin and a second semiconductor layer over the silicon-germanium fin, wherein the first protrusion comprises the first semiconductor layer, and wherein the second protrusion comprises the second semiconductor layer, and wherein a third lateral width of the first protrusion is lesser than a fourth lateral width of the second protrusion;
- converting at least a portion of the first semiconductor layer to a first dielectric layer and at least a portion of the second semiconductor layer to a second dielectric layer;
- and
- forming a first gate structure over the first dielectric layer and a second gate structure over the second dielectric layer.
4 more elements
Dependencies are inferred from the claim text.