Integrated circuit with overlapping stressors
AssigneeNXP USA, Inc.
InventorsDouglas Michael Reber, Mehul D. Shroff, Ertugrul Demircan
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Abstract
An integrated circuit includes a compressive stressor and a tensile stressor, each located directly over an active region of a transistor, where a portion of the compressive stressor and a portion of the tensile stressor directly overlap with each other. In some embodiments, utilizing a compressive stressor and tensile stressor located directly over an active region with overlapping portions may allow for an adjustment of the stress applied to a channel region of a transistor to compensate for stress imparted by package structures.
Claims20
An integrated circuit comprising:
- a first transistor including an active region;
- a first stressor of a first stressor type located directly over the active region;
- a second stressor of a second stressor type opposite the first stressor type located directly over the active region, wherein the first stressor and the second stressor each includes a portion that directly overlaps each other.
An integrated circuit comprising:
- a first field-effect transistor (FET) including an active region;
- a first stressor of a first stressor type located directly over the active region;
- a second stressor of a second stressor type opposite the first stressor type located directly over the active region, wherein the first stressor and the second stressor each include a portion that directly overlaps each other over the active region of the FET, wherein the first stressor includes a portion that does not directly overlap with a portion of the second stressor.
Dependencies are inferred from the claim text.