Semiconductor devices and data storage systems including the same

A semiconductor device, comprising:

• a plate layer;
• a plurality of conductive layers on the plate layer and spaced apart from each other in a first direction perpendicular to an upper surface of the plate layer, wherein the plurality of conductive layers extend by different lengths in a second direction perpendicular to the first direction, and wherein the plurality of conductive layers form a staircase region;
• a gap-fill insulating layer on the staircase region;
• and
• a plurality of vertical structures extending through the gap-fill insulating layer and the plurality of conductive layers in the staircase region, wherein the plurality of vertical structures extend in the first direction, and
• wherein the gap-fill insulating layer includes a plurality of voids disposed in a third direction perpendicular to the first direction and the second direction, and
• wherein the plurality of voids are disposed symmetrically with respect to at least one of at least one vertical structure of the plurality of vertical structures, or a center of the staircase region.

A data storage system, comprising:

• a semiconductor storage device including
• a first semiconductor structure including a plurality of circuit devices,
• a second semiconductor structure on a surface of the first semiconductor structure, and
• an input/output pad electrically connected to the plurality of circuit devices;
• and
• a controller electrically connected to the semiconductor storage device through the input/output pad, wherein the controller is configured to control the semiconductor storage device,
• wherein the second semiconductor structure includes:
• a plate layer;
• a plurality of gate electrodes on the plate layer and spaced apart from each other in a first direction perpendicular to an upper surface of the plate layer, wherein the plurality of gate electrodes extend by different lengths in a second direction perpendicular to the first direction, and wherein the plurality of gate electrodes form a staircase region;
• a gap-fill insulating layer on the staircase region;
• and
• a plurality of contact plugs extending through the gap-fill insulating layer and the staircase region, wherein the plurality of contact plugs extend in the first direction, and
• wherein the gap-fill insulating layer includes a plurality of voids spaced apart from the plurality of contact plugs and the plurality of gate electrodes.

A method of manufacturing a semiconductor device, the method comprising:

• forming a mold structure by alternately stacking a plurality of sacrificial insulating layers and a plurality of interlayer insulating layers on a plate layer;
• forming a staircase region having a step structure by partially removing the mold structure;
• forming a gap-fill sacrificial layer filling the staircase region;
• forming a plurality of vertical sacrificial layers extending through the gap-fill sacrificial layer and the mold structure;
• removing the gap-fill sacrificial layer;
• and
• forming a gap-fill insulating layer including a plurality of voids in a region from which the gap-fill sacrificial layer is removed.