US 2025/0062764 A1 · BUFFER WITH REDUCED SHOOT-THROUGH CURRENT

Abstract

A buffer includes a first branch to receive a digital input signal and generate a first intermediate signal having falling edges that are delayed and faster than rising edges of the digital input signal and rising edges that are substantially coincident with falling edges of the digital input signal and a second branch to receive the digital input signal and generate a second intermediate signal having rising edges that are delayed and faster than falling edges of the digital input signal and falling edges that are substantially coincident with rising edges of the digital input signal. An output stage has a first input to receive the first intermediate signal, a second input to receive the second intermediate signal, and an output at which a buffer output signal is provided as a delayed version of the digital input signal having faster rising and falling edges than the digital input signal.

Claims15

Dependent claims

A digital buffer comprising:

a first branch configured to receive a digital input signal and generate a first intermediate signal having falling edges that are delayed and faster than rising edges of the digital input signal and rising edges that are substantially coincident with falling edges of the digital input signal;
a second branch configured to receive the digital input signal and generate a second intermediate signal having rising edges that are delayed and faster than falling edges of the digital input signal and falling edges that are substantially coincident with rising edges of the digital input signal;
and
an output stage having a first input coupled to receive the first intermediate signal, a second input coupled to receive the second intermediate signal, and an output at which a buffer output signal is provided, wherein the buffer output signal is a delayed version of the digital input signal having faster rising and falling edges than the digital input signal.

1 more element

A method for generating a buffer output signal having faster edges than a digital input signal, comprising:

generating a first intermediate signal having delayed and faster falling edges with respect to rising edges of the digital input signal;
generating a second intermediate signal having delayed and faster rising edges with respect to falling edges of the digital input signal;
and
combining the first and second intermediate signals to generate the buffer output signal as a delayed version of the digital input signal having faster rising and falling edges than the digital input signal.

1 more element

Dependencies are inferred from the claim text.

Buffer with reduced shoot-through current

Life of this patent

Buffer with reduced shoot-through current

Life of this patent

Abstract

Claims15