Power converter mcu synchronization
Assigneedcbel Inc.
InventorJean-Hugues DESCHÊNES
Life of this patent
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Abstract
A power converter controlled by a micro-controller unit (MCU) is effectively synchronized by using a signal received by a hardware subsystem of the MCU. The synchronization signal can control multiple power converters and can be generated by one power converter or a synchronization controller with generation of the synchronization signal generated using a hardware subsystem of an MCU, namely a hardware timer. The timer can be used to obtain a switch state from a memory table using direct memory access (DMA).
Claims14
A method for synchronizing a plurality of power converters each having power switches controlled by a microcontroller unit (MCU) having a processor, a memory, at least one integrated hardware timer and direct memory access (DMA), the method comprising:
- providing a synchronization signal to said hardware timer of said MCU of each of said plurality of power converters;
- in each of said plurality of power converters, executing processor instructions stored in said memory to issue control signals for said power switches, said processor instructions referencing a value in said memory defining a duty cycle for control of said power switches;
- and
- in each of said plurality of power converters, using an output of said hardware timer to control using DMA to change said value in said memory.
A power converter comprising:
- a plurality of power switches;
- a microcontroller unit (MCU) connected to gates of said plurality of power switches and having a processor, a memory, at least one integrated hardware timer and direct memory access (DMA);
- said hardware timer of said MCU able to receive a synchronization signal;
- said memory storing switch control reference values and processor instructions that when executed by said processor cause said processor to:
- issue control signals for said power switches, said processor instructions referencing one of said switch control reference values in said memory defining a duty cycle for control of said power switches;
- and
- use an output of said hardware timer to control using DMA to change said value in said memory.
Dependencies are inferred from the claim text.