Semiconductor packages

A semiconductor package comprising:

• a package substrate;
• a plurality of upper dies above the package substrate, each upper die arranged so as not to overlap vertically with others of the plurality of upper dies;
• a plurality of electrical connection structures between the package substrate and the plurality of upper dies, the plurality of electrical connection structures electrically connected to the package substrate;
• and
• a lower die on the package substrate and arranged so as not to overlap vertically with the plurality of electrical connection structures,
• wherein each of the plurality of upper dies partially overlaps the lower die vertically, and
• wherein the plurality of electrical connection structures are asymmetrically arranged with respect to respective centers of the plurality of upper dies.

A semiconductor package comprising:

• a package substrate;
• at least one upper die on the package substrate;
• a plurality of electrical connection structures between the package substrate and the at least one upper die, the plurality of electrical connection structures electrically connected to the package substrate;
• a lower die on the package substrate and arranged so as not to vertically overlap with the plurality of electrical connection structures;
• an encapsulant that seals the plurality of electrical connection structures and the lower die;
• and
• at least one buffer die electrically connected between and to the at least one upper die and the plurality of electrical connection structures,
• wherein a lower surface of the buffer die is in direct contact with the encapsulant.

The semiconductor package of claim 18, wherein the encapsulant comprises:

• a lower encapsulant that seals the plurality of electrical connection structures and the lower die;
• and
• an upper encapsulant that seals the at least one upper die,
• wherein an interface is between a lower surface of the upper encapsulant and an upper surface of the lower encapsulant. 20 The semiconductor package of claim 19, wherein the at least one upper die includes at least four upper dies which are arranged so as not to overlap each other vertically.
• wherein the at least four upper dies vertically overlap respective corners of the lower die.