Staggered stacked light-emitting chip structure, method of manufacturing the same, and image display device using the same

A method for manufacturing a staggered stacked light-emitting chip structure, comprising:

• providing a circuit substrate;
• placing a first light-emitting chip on the circuit substrate to electrically connect to the circuit substrate, wherein the first light-emitting chip has a first top light-emitting surface, a first bottom non-soldering pad area, a first positive electrode pad and a first negative electrode pad;
• stacking a second light-emitting chip on the first light-emitting chip to electrically connect to the circuit substrate, wherein the second light-emitting chip has a second top light-emitting surface, a second bottom non-soldering pad area, a second positive electrode pad and a second negative electrode pad;
• and
• stacking a third light-emitting chip on the second light-emitting chip to electrically connect to the circuit substrate, wherein the third light-emitting chip has a third top light-emitting surface, a third bottom non-soldering pad area, a third positive electrode pad and a third negative electrode pad;
• wherein the first light-emitting chip, the second light-emitting chip and the third light-emitting chip are stacked sequentially from bottom to top, and the first light-emitting chip, the second light-emitting chip and the third light-emitting chip are horizontally staggered from each other;
• wherein a vertical projection of the second bottom non-soldering pad area of the second light-emitting chip partially falls on the first top light-emitting surface of the first light-emitting chip, and a vertical projection of the third bottom non-soldering pad area of the third light-emitting chip partially falls on the first top light-emitting surface of the first light-emitting chip and the second top light-emitting surface of the second light-emitting chip;
• wherein a vertical projection of the second positive electrode pad and a vertical projection of the second negative electrode pad of the second light-emitting chip do not fall on the first top light-emitting surface of the first light-emitting chip, and a vertical projection of the third positive electrode pad and a vertical projection of the third negative electrode pad of the third light-emitting chip do not fall on the first top light-emitting surface of the first light-emitting chip and the second top light-emitting surface of the second light-emitting chip.

An image display device, comprising:

• a circuit substrate;
• and
• a plurality of staggered stacked light-emitting chip structures disposed on the circuit substrate and electrically connected to the circuit substrate;
• wherein each of the staggered stacked light-emitting chip structures includes a first light-emitting chip, a second light-emitting chip and a third light-emitting chip;
• wherein the first light-emitting chip has a first top light-emitting surface, a first bottom non-soldering pad area, a first positive electrode pad and a first negative electrode pad, the second light-emitting chip has a second top light-emitting surface, a second bottom non-soldering pad area, a second positive electrode pad and a second negative electrode pad, and the third light-emitting chip has a third top light-emitting surface, a third bottom non-soldering pad area, a third positive electrode pad and a third negative electrode pad;
• wherein the first light-emitting chip, the second light-emitting chip and the third light-emitting chip are stacked sequentially from bottom to top, and the first light-emitting chip, the second light-emitting chip and the third light-emitting chip are horizontally staggered from each other;
• wherein a vertical projection of the second bottom non-soldering pad area of the second light-emitting chip partially falls on the first top light-emitting surface of the first light-emitting chip, and a vertical projection of the third bottom non-soldering pad area of the third light-emitting chip partially falls on the first top light-emitting surface of the first light-emitting chip and the second top light-emitting surface of the second light-emitting chip;
• wherein a vertical projection of the second positive electrode pad and a vertical projection of the second negative electrode pad of the second light-emitting chip do not fall on the first top light-emitting surface of the first light-emitting chip, and a vertical projection of the third positive electrode pad and a vertical projection of the third negative electrode pad of the third light-emitting chip do not fall on the first top light-emitting surface of the first light-emitting chip and the second top light-emitting surface of the second light-emitting chip.