Power semiconductor package

A power semiconductor package, comprising:

• a plurality of first power semiconductor dies attached to a first metallization layer;
• a plurality of second power semiconductor dies attached to a second metallization layer;
• a first structured metal frame disposed above the first metallization layer and electrically connected to a load terminal of each power semiconductor die of the plurality of first power semiconductor dies;
• a second structured metal frame disposed above the second metallization layer and electrically connected to a load terminal of each power semiconductor die of the plurality of second power semiconductor dies and to the first metallization layer;
• and
• a lead frame disposed above the first and the second structured metal frames and comprising:
• a first lead electrically connected to the second metallization layer;
• a second lead electrically connected to the second metallization layer;
• a third lead interposed between the first and second leads and electrically connected to the first structured metal frame;
• and
• a fourth lead electrically connected to the second structured metal frame.