Semiconductor package and manufacturing method thereof

A semiconductor package comprising:

• a first semiconductor chip having a front side and a back side that is opposite to the front side, the first semiconductor chip including a front side wiring structure disposed on the front side, a back side wiring structure disposed on the back side, and a first through-via electrically connected to the front side wiring structure and the back side wiring structure;
• a second semiconductor chip disposed on the back side of the first semiconductor chip and including a second through-via electrically connected to the first semiconductor chip;
• a third semiconductor chip disposed on the front side of the first semiconductor chip;
• an encapsulant encapsulating at least a portion of the second semiconductor chip;
• and
• a rewiring structure disposed on the second semiconductor chip,
• wherein a diameter of the first through-via is less than a diameter of the second through-via.

A method for manufacturing a semiconductor package comprising:

• providing a first wafer structure on which a first front side wiring structure is formed;
• providing a second wafer structure on which a second front side wiring structure is formed;
• bonding the first wafer structure to the second wafer structure;
• forming a first through-via in the second wafer structure to be connected to the second front side wiring structure;
• forming a back side wiring structure in the second wafer structure to be connected to the first through-via;
• disposing a semiconductor chip including a second through-via on the second wafer structure;
• and
• dicing the bonded first wafer structure and the second wafer structure.