Semiconductor package and manufacturing method for the same

A semiconductor package, comprising:

• a substrate;
• a first semiconductor chip disposed on the substrate;
• a second semiconductor chip disposed on the first semiconductor chip;
• a passive component disposed side by side with the second semiconductor chip on the first semiconductor chip;
• and
• an encapsulant that encapsulates the second semiconductor chip and the passive component,
• wherein the first semiconductor chip includes
• a first through via that extends through at least a portion of the first semiconductor chip and electrically connects the passive component and the first semiconductor chip,
• a first pad disposed on a first surface thereof and connected to the first through via,
• a second through via that extends through at least a portion of the first semiconductor chip and electrically connects the second semiconductor chip to the first semiconductor chip,
• a second pad disposed on the first surface and connected to the second through via, and
• a first insulating layer disposed on the first surface adjacent to a side surface of each of the first pad and the second pad,
• wherein the passive component includes a third pad disposed on a first surface thereof and a second insulating layer disposed on the first surface adjacent to a side surface of the third pad, and
• the first pad and the third pad are directly bonded by contacting each other.

A manufacturing method for a semiconductor package, comprising:

• attaching a first semiconductor chip to a substrate;
• attaching a second semiconductor chip and a passive component to the first semiconductor chip;
• and
• encapsulating the second semiconductor chip and the passive component by using an encapsulant,
• wherein the passive component is attached to the first semiconductor chip by hybrid bonding.