Signal channel, module substrate, and semiconductor system including the same
AssigneeUIF (University Industry Foundation), Yonsei University
InventorsHYUN JUN PARK, Woo-Seok Choi
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Abstract
A signal channel according to embodiments of the present disclosure includes a plurality of signal lines disposed on a plurality of layers spaced apart from each other in a first direction and connecting first points and second points to each other. A plurality of sections are defined between the first points and the second points. A first signal line disposed on a first layer of the plurality of layers in a first section of the plurality of sections is electrically connected to a second signal line disposed on a second layer of the plurality of layers in a second section of the plurality of sections.
Claims20
A signal channel, comprising:
- a plurality of signal lines disposed on a plurality of layers, wherein each of the plurality of signal lines are spaced apart from each other in a first direction and connect first points and second points to one another,
- wherein a plurality of sections are defined between the first points and the second points, and
- wherein a first signal line, of the plurality of signal lines, is disposed on a first layer, of the plurality of layers, in a first section, of the plurality of sections, and is electrically connected to a second signal line, of the plurality of signal lines, disposed on a second layer, of the plurality of layers, in a second section, of the plurality of sections.
A module substrate, comprising:
- a substrate main body including a dielectric material and including a plurality of layers spaced apart from each other in a first direction;
- and
- a plurality of signal lines that are disposed on the plurality of layers, wherein the plurality of signal lines electrically connect first points and second points to one another, and wherein the plurality of signal lines are twisted or braided with one another,
- wherein a plurality of sections are defined between the first points and the second points, and
- wherein a first signal line, of the plurality of signal lines, disposed on a first layer of the plurality of layers in a first section of the plurality of sections is electrically connected to a second signal line, of the plurality of signal lines, disposed on a second layer of the plurality of layers in the second section of the plurality of sections.
A semiconductor system, comprising:
- a plurality of stacked memory dies;
- a buffer die disposed below the plurality of stacked memory dies;
- a memory controller;
- and
- an interposer that includes a plurality of signal lines electrically connecting first points of the memory controller and second points of the buffer die to one another,
- wherein a plurality of sections are defined between the first points and the second points, and
- wherein a first signal line, of the plurality of first signal lines, disposed on a first layer of the plurality of layers in a first section of the plurality of sections is electrically connected to a second signal line, of the plurality of first signal lines, disposed on a second layer of the plurality of layers in a second section of the plurality of sections.
Dependencies are inferred from the claim text.