Hard ip blocks with physically bidirectional passageways
AssigneeAdeia Semiconductor Inc.
InventorJavier A. DeLaCruz
Life of this patent
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Abstract
Hard IP blocks, such as SerDes chips, are designed with keepout zones beneath the surface interconnects, the keepout zones being spaces within the chip where there is no circuitry. Connections can be formed between surface interconnects on an under surface of the SerDes chip that faces the host die, and surface interconnects on an upper surface of the Ser Des chip that interfaces without external devices. Accordingly, redistribution layers routing around an outer periphery of the SerDes chip are no longer needed, and the resistive capacitive load remains low so as not to adversely impact transmitted signals.
Claims21
(canceled)
An integrated circuit (IC) device, comprising:
- a host die;
- and
- a chiplet directly bonded to the host die, the chiplet comprising:
- a circuitry layer formed over a chiplet substrate and comprising active circuitry for serializing or deserializing signals received by the circuitry layer,
- one or more keepout zones laterally surrounded by the active circuitry, the one or more keepout zones defining spaces exclusive of the active circuitry, and
- a plurality of surface interconnects formed over the one or more keepout zones at a surface of the chiplet facing away from the host die, the surface interconnects comprising receive interconnects for receiving signals to be serialized or deserialized by the active circuitry and transmit interconnects for transmitting signals serialized or deserialized by the active circuitry.
An integrated circuit (IC) device, comprising:
- a host die;
- and
- a chiplet directly bonded to the host die, the chiplet comprising:
- a circuitry layer formed over a chiplet substrate and comprising active circuitry for serializing or deserializing signals received by the circuitry layer,
- one or more keepout zones laterally surrounded by the active circuitry, the one or more keepout zones defining spaces exclusive of the active circuitry,
- a plurality of surface interconnects formed over the one or more keepout zones at a surface of the chiplet facing away from the host die, and
- one or more through-hole interconnects formed in the one or more keepout zones and vertically extending through the chiplet in a vertical direction, wherein some of the through-hole interconnects electrically connect the surface interconnects and the host substrate.
Dependencies are inferred from the claim text.