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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing-Tsu Chung, Yung-Chi Lin, Yan-Zuo Tsai, Yang-Chih Hsueh, Ming-Shih Yeh
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A method includes bonding a device die onto a package component. The device die includes a semiconductor substrate, and a through-via extending into the semiconductor substrate. The method further includes depositing a dielectric liner lining sidewalls of the device die, depositing a dielectric layer on the dielectric liner, and planarizing the dielectric layer and the device die. Remaining portions of the dielectric liner and the dielectric layer form a gap-filling region, and a top end of the through-via is revealed. An implantation process is performed to introduce a stress modulation dopant into at least one of the dielectric liner and the dielectric layer. A redistribution line is formed over and electrically connecting to the through-via.
A method comprising:
A structure comprising:
A structure comprising:
Dependencies are inferred from the claim text.