Energy efficient fast read in a memory device

A memory device, comprising:

• a memory block including an array of memory cells that are arranged in a plurality of word lines;
• and
• circuitry that is configured to sense threshold voltages of the memory cells of a selected word line of the plurality of word lines in a sensing operation, during the sensing operation the circuitry being configured to;
• in a first sensing process, sense the memory cells of the selected word line using both a fast read technique and a positive sensing technique,
• determine a fail bit count and compare the fail bit count to a threshold,
• in response to the fail bit count being less than or equal to the threshold, complete the sensing operation, and
• in response to the fail bit count exceeding the threshold, then perform a second sensing process to sense threshold voltages of the memory cells of the selected word line using a relatively slower read technique.

An apparatus, comprising:

• a memory block including an array of memory cells that are arranged in a plurality of word lines;
• and
• a sensing means for reading the memory cells of a selected word line of the plurality of word lines in a sensing operation, during the sensing operation the sensing means being configured to;
• in a first sensing process, sense the memory cells of the selected word line using both a fast read technique where timing parameters are reduced as compared to a normal read technique and a positive sensing technique where a voltage applied to a source line of the memory block is approximately zero,
• determine a fail bit count and compare the fail bit count to a threshold,
• in response to the fail bit count being less than or equal to the threshold, complete the sensing operation, and
• in response to the fail bit count exceeding the threshold, then perform a second sensing process to sense threshold voltages of the memory cells of the selected word line using a relatively slower read technique and a negative sensing technique.