Ternary memory cell and memory device comprising same

A memory device comprising a ternary memory cell, the memory device comprising:

• a first inverter and a second inverter cross-coupled in a first node and a second node and comprising a pull-up device and a pull-down device configured to have a constant current pass therethrough upon turn-off;
• a first read transistor and a first write transistor that are connected to each other in parallel between the first node and a first bit line;
• and
• a second read transistor and a second write transistor that are connected to each other in parallel between the second node and a second bit line
• wherein the memory device is configured to perform a method, the method comprising:
• causing a read access current, which is less than or equal to the constant current, to pass through the first read transistor and the second read transistor in response to an activated read word line;
• and
• storing a ternary value by causing the ternary memory cell to be in a state corresponding to one of the following states:
• a first state in which both of the pull-up device and the pull-down device are turned off, a second state in which the pull-up device is turned on and the pull-down device is turned off, and a third state in which the pull-up device is turned off and the pull-down device is turned on, wherein:
• the pull-up device and the pull-down device are configured to have a first current pass therethrough in the first state and a second current greater than the first current pass therethrough in the second state and the third state, and
• wherein the first read transistor and the second read transistor have greater threshold voltages than those of the first write transistor and the second write transistor.

A memory device comprising a ternary memory cell storing a ternary value, the memory device comprising:

• a first inverter and a second inverter cross-coupled in a first node and a second node and comprising a pull-up device and a pull-down device configured to have a constant current pass therethrough upon turn-off;
• a first access transistor connected to the first node and a first bit line;
• and
• a second access transistor connected to the second node and a second bit line;
• wherein the memory device is configured to perform a method, the method comprising:
• causing a row decoder configured to provide a read word line voltage to each of the first access transistor and the second access transistor such that a read access current which is less than or equal to the constant current passes through the first access transistor and the second access transistor in a read operation;
• and
• storing a ternary value in the ternary memory cell by causing the ternary memory cell to be in a state corresponding to one of the following:
• a first state in which both of the pull-up device and the pull-down device are turned off, a second state and a third state in which one of the pull-up device and the pull-down device is turned on and the other is turned off, wherein:
• the pull-up device and the pull-down device are configured to have a first current pass therethrough in the first state and have a second current, which is greater than the first current, pass therethrough in the second state and the third state, and
• wherein the row decoder is configured to provide a write word line voltage to each of the first access transistor and the second access transistor such that a write access current having a magnitude greater than or equal to the second current passes through the first access transistor and the second access transistor in a write operation.