Direct decision feedback equalization single-ended receiver

A memory device comprising:

• a memory array comprising a set of memory cells;
• and
• a decision feedback equalizer (DFE) sub-system, the DFE sub-system comprising:
• a first data detector circuit comprising a first tap circuit, wherein the first data detector circuit generates a first subset of detected bit values corresponding to a data signal using a first reference voltage;
• and
• a second data detector circuit comprising a second tap circuit, wherein the second data detector circuit generates a second subset of detected bit values corresponding to the data signal using a second reference voltage.

A method comprising:

• receiving a data signal via an interface coupled to a memory sub-system controller;
• generating, by a first data detector circuit comprising a first tap circuit, a first subset of detected bit values corresponding to the data signal using a first reference voltage;
• and
• generating, by a second data detector circuit comprising a second tap circuit, a first subset of detected bit values corresponding to the data signal using a second reference voltage.