Inter-die connectors for data and error correction information and related methods and apparatuses
AssigneeLodestar Licensing Group LLC
InventorVijayakrishna J. Vankayala
Life of this patent
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Abstract
Apparatuses for transfer of data and error correction between semiconductor dies are disclosed. An apparatus may include a number of dies including a first die and a second die. The first die may be configured to receive data bits and error correction information from the second die via inter-die connectors. The first die may further be configured to generate new error correction information corresponding to the data bits via the error correction circuitry. Further, the first die may be configured to write the data bits to data storage elements responsive to a determination that the error correction information matches the new error correction information.
Claims20
An apparatus, comprising:
- a number of dies including a first die and a second die;
- the first die configured to:
- receive data bits and error correction information from the second die via inter-die connectors;
- generate new error correction information corresponding to the data bits via error correction circuitry;
- and
- write the data bits to data storage elements responsive to a determination that the error correction information matches the new error correction information.
An apparatus, comprising:
- a master die;
- and
- a target die coupled to the master die and configured to:
- receive error correction information and write data bits from the master die;
- generate new error correction information responsive to the write data bits;
- and
- provide error information to the master die responsive to the new error correction information being different than the error correction information.
An apparatus, comprising:
- a master die;
- a target die including error correction circuitry configured to generate error correction information based on data bits;
- inter-die error correction connectors configured to provide the error correction information between the target die and the master die;
- and
- inter-die data connectors configured to provide the data bits between the target die and the master dies, wherein the target die is configured to trigger the master die to obtain the data bits from the target die.
A method of operating a stack of memory dies, the method comprising:
- receiving, by a master die of the stack of memory dies, data bits and error correction information associated with the data bits from control circuitry;
- sending the data bits and the error correction information to a target die of a stack of memory dies through inter-die data connectors;
- generating, by the target die, new error correction information associated with the data bits;
- comparing, by the target die, the error correction information to the new error correction information;
- and
- generating error information responsive to a determination that the error correction information is different from the new error correction information.
Dependencies are inferred from the claim text.