Probabilistic error correction in flash-based storage systems

A system comprising:

• a memory;
• and
• a processing device, operatively coupled to the memory, the processing device configured to:
• determine that a number of data shards in a data stripe having an unrecoverable error correction code (UECC) error exceeds a number of failed shards allowable under a redundancy level of the data stripe;
• identify, in a portion of data in a data shard having the UECC error, a plurality of low-confidence bits, wherein, to identify the plurality of low-confidence bits, the processing device is further configured to:
• perform multiple reads of the portion of data;
• identify, as the plurality of low-confidence bits, a plurality of bits having values differing across the multiple reads;
• and
• correct the portion of data based on the one or more low-confidence bits that were identified.