Semiconductor memory device and controlling method thereof
AssigneeWinbond Electronics Corp.
InventorToshio NINOMIYA
Life of this patent
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AssigneeWinbond Electronics Corp.
InventorToshio NINOMIYA
Estimating the term…
A semiconductor memory device includes a memory unit and an error detection and correction unit. The memory unit is an OTP memory including a data memory and a check memory. The data memory is written with replacement address information detected during a redundancy repair operation and corresponding to a defective memory cell of a memory cell array. The check memory is written with check information detected during the redundancy repair operation and corresponding to the replacement address information. The error detection and correction unit performs error detection and correction on the replacement address information based on the check information. The data memory includes a unit accommodating the replacement address information. When other replacement address information and any of the replacement address information and the check information corresponding to the replacement address information are in the unit, the error detection and correction unit will not perform error detection and correction.
A semiconductor device, comprising:
A control method of a semiconductor device,
Dependencies are inferred from the claim text.