Method and apparatus for direct convolution calculation

A method performed in a system comprising datapath processing circuitry having a plurality of processing lanes, the method comprising:

• executing a first sequence of matrix multiply and add (MMA) operations using a first vector in an input memory and a second vector as inputs and accumulating a result of the first sequence of MMA operations in an output memory, wherein the input memory and the output memory are associated with the plurality of processing lanes, and wherein the first vector comprises a first plurality of first elements from a first input matrix and the second vector comprises a first plurality of second elements from a second input matrix;
• forming a shifted first vector in the input memory from the first vector, wherein the shifted first vector comprises a second plurality of first elements that includes a subset of the first plurality of first elements from the input memory and at least one additional first element loaded to the input memory from another memory;
• and
• executing a second sequence of MMA operations using the shifted first vector and a third vector as inputs and accumulating a result of the second sequence of MMA operations in the output memory, wherein the third vector comprises a second plurality of second elements from the second input matrix.

A datapath processing method comprising:

• executing a first sequence of matrix multiply and add (MMA) operations using as inputs (a) a first vector comprising elements of a first input matrix and (b) a second vector comprising elements of a second input matrix;
• accumulating a result of the first sequence of MMA operations;
• shifting the first vector;
• executing a second sequence of MMA operations using as inputs (c) a third vector comprising the shifted first vector and at least one additional matrix element, and (d) a fourth vector comprising elements of the second input matrix;
• and
• accumulating a result of the second sequence of MMA operations.