Back to results
US 2025/0056871 A1Published application
Methods of forming bottom dielectric isolation layers
AssigneeApplied Materials, Inc.
InventorsSan-Kuei Lin, Pradeep K. Subrahmanyan
Life of this patent
Estimating the term…
Abstract
Embodiments of this disclosure relate to methods for removing a dummy material from under a superlattice structure. In some embodiments, after removing the dummy material, it is replaced with a bottom dielectric isolation layer beneath the superlattice structure.
Claims20
A processing method for removing a dummy material, the method comprising:
- forming a liner over a transistor structure on a dummy material, the dummy material comprising one or more of silicon (Si) or silicon germanium (SiGe);
- removing the liner from the dummy material;
- and
- removing the dummy material without substantially affecting the transistor structure covered by the liner.
1 more element
Dependencies are inferred from the claim text.