Systems and methods for increasing energy-scale by minimizing qubit inductance

A hybrid computing system comprising:

• a quantum processor, the quantum processor comprising a plurality of qubits and couplers, each qubit in the plurality of qubits comprising a respective qubit body, the qubit body comprising a loop of superconducting material interrupted by at least one compound-compound Josephson junction (CCJJ), the qubit body communicatively coupled to an inductance tuner (L-tuner), the CCJJ communicatively coupled to a respective CCJJ analog bias line and a respective CCJJ offset DAC;
• at least one digital processor;
• and
• at least one non-transitory computer-readable storage medium communicatively coupled to the at least one digital processor and that stores processor-executable instructions which, when executed, causes the at least one digital processor to:
• cause a respective L-tuner of at least a set of qubits to compensate for a coupler inductance loading;
• determine a remaining respective L-tuner range for each qubit in the set of qubits;
• compute a minimum homogenized inductance across all qubits in the set of qubits from the remaining respective L-tuner range;
• cause a respective L-tuner of each qubit in the set of qubits to apply an inductance ΔL to each qubit in the set of qubits to achieve the minimum homogenized inductance;
• compute a first shift in CCJJ bias ΔCCJJ due to the applied inductance ΔL;
• and
• cause a respective CCJJ offset DAC of each qubit in the set of qubits to apply a respective second CCJJ bias shift −ΔCCJJ*(Mccjj−mean(Mccjj)) to each qubit in the set of qubits, wherein Mccjj is a mutual inductance between a respective CCJJ analog bias line and a respective lobe of the CCJJ and mean(Mccjj) is a calculated mean value of Mccjj across all qubits.