Ai chip, electronic device, and convolution operation method

Abstract

Provided are AI chip, electronic device and convolution operation method. AI chip includes: N convolution cores and storage control system. Storage control system is electrically connected to N convolution cores. Storage control system reads input image data from memory, distributes input image data to each convolution core, reads each weight block from memory, splits each weight block into N pieces of weight data, and distribute N pieces of weight data to N convolution cores, each convolution core corresponds to a piece of weight data, and each weight block is part of complete weight; each convolution core performs convolution operation on received weight data and input image data. Convolution operation results of each convolution core for the same weight block are added to obtain convolution operation result of each weight block, and convolution operation results of each weight block are added to obtain final convolution operation result.

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