Frame replication and elimination on microcontroller

A method to receive a message using a network processor, the network processor including a plurality of network ports, a memory buffer coupled to the plurality of network ports, a frame parser hardware coupled to the memory buffer, and a random access memory (RAM) coupled to both the frame parser hardware and a central processing unit (CPU), the method comprising:

• receiving a first Ethernet frame via the plurality of network ports, the first Ethernet frame including a frame header, a redundancy tag (R-TAG), and a data payload corresponding to the message;
• storing the first Ethernet frame in the memory buffer;
• reading the first Ethernet frame from the memory buffer using the frame parser hardware, and determining the R-TAG within the first Ethernet frame as read from the memory buffer using the frame parser hardware;
• comparing the frame header and the R-TAG to previously received frame headers and previously received R-TAGs to determine whether the first Ethernet frame is a duplicate frame whose frame header matches one of the previously received frame headers and whose R-TAG matches one of the previously received R-TAGs;
• and
• writing the first Ethernet frame from the memory buffer to the RAM only when the first Ethernet frame is not a duplicate frame.

A network processor, comprising:

• a system bus;
• a central processing unit (CPU) coupled to the system bus;
• a random access memory (RAM) coupled to the CPU via the system bus;
• a plurality of network ports coupled to the CPU and the RAM;
• and
• a network bridge coupled between the CPU and the plurality of network ports, the network bridge comprising:
• a first transmit Direct Memory Access (DMA) circuit and a first transmit memory buffer coupled between the first transmit DMA circuit and a first network port, and a receive memory buffer and frame parser hardware arranged between the receive memory buffer and the system bus.