Opportunistic cleaning of coherence directories to reduce cache-coherence overhead

A cache-coherent computer system node comprising:

• a network-on-chip;
• a plurality of computing elements connected in a fully cache-coherent manner in communication with the network-on-chip;
• a coherence directory comprising a plurality of addresses for cache of the plurality of computing elements, a plurality of coherence states of the plurality of addresses, and a plurality of tracking vectors of the plurality of addresses;
• and
• a coherence directory controller configured to send a probe to the plurality of computing elements during a free cycle of the network-on-chip,
• wherein the probe is configured to inquire whether an address of the plurality of addresses stored in the coherence directory is in the cache of the plurality of computing elements, and
• wherein the coherence directory is configured clean the coherence directory to remove the address in response to an acknowledgement indicating that the address is not in the cache.