Event processing by hardware accelerator

Abstract

A hardware acceleration circuit, comprising a communication interface for connecting to one or more event-driven circuits, a memory, an event handling circuit, and a hardware acceleration engine. The event handling circuit is adapted to detect one or more events triggered by one or more of the event-driven circuits, update one or more pointers pointing to one or more event handling routines stored in the memory and to a context memory segment in the memory storing a plurality of context parameters relating to the one or more events, and transmit the pointer(s) to the hardware acceleration engine. The hardware acceleration engine is adapted to receive the pointer(s) from the event handling circuit, and execute the event handling routine(s) pointed by the pointer(s) to process data relating to the event(s) according to at least some of the context parameters retrieved from the context memory segment using the pointer(s).

Dependencies are inferred from the claim text.