Method and apparatus for floating point arithmetic

A method for floating point arithmetic performed by apparatus for floating point arithmetic, the method comprising:

• performing a right shift operation of a first operand and a second operand so that an exponent of the first operand and an exponent of the second operand being input have a same value;
• storing discarded bits of the second operand during the right shift operation of the first operand and the second operand;
• calculating the first operand and the second operand and outputting an operation result of higher N bits;
• and
• outputting an operation result of lower N bits by adding, to the discarded bits of the second operand, bits lost through a normalization operation and a rounding operation in the calculation of the right shift operation of the first operand and the second operand.

An apparatus for floating point arithmetic, the apparatus comprising:

• a comparator configured to compare exponents of at least two operands;
• a controller configured to control to store bit information of a mantissa of at least one operand among the at least two operands in a flip-flop based on a comparison result of the comparator;
• a first adder and subtractor configured to perform an addition operation or a subtraction operation on the at least two operands based on the control of the controller and output an operation result of a higher bit;
• and
• a second adder and subtractor configured to output an operation result by a normalization operation and a rounding operation after the addition or subtraction operation of the first adder and subtractor,
• wherein the controller is configured to control the second adder and subtractor to output an operation result of lower bits by adding bits lost through a normalization operation and a rounding operation to the bit information of the mantissa of the at least one operand.