Power regeneration in a memory device
AssigneeMicron Technology, Inc.
InventorAnthony D. Veches
Life of this patent
Estimating the term…
Abstract
A memory device comprises multiple memory dice arranged vertically in a stack of memory dice and at least one thermoelectric die contacting the bulk silicon layer of at least one of the memory dice of the multiple memory dice. Each memory die of the multiple memory dice includes an active circuitry layer that includes memory cells of a memory array and a bulk silicon layer. The thermoelectric die is configured to one or both of reduce heat from the memory die when a current is applied to terminals of the thermoelectric die and generate a voltage at the terminals of the thermoelectric die when heat from the memory die is applied to the thermoelectric die.
Claims20
A memory system comprising:
- multiple memory dice arranged in a stack of memory dice, wherein at least one memory die of the multiple memory dice includes an active circuitry layer that includes memory cells and a bulk silicon layer contacting the active layer on a first layer surface;
- and
- at least one peltier element configured to reduce heat of the at least one memory die when a current is applied to the at least one peltier element.
A method of operating a memory system, the method comprising:
- monitoring temperature of memory cells, included in at least one memory die of multiple memory dice arranged in a vertical stack of memory dice;
- and
- applying current to a peltier element contacting the at least one memory die to reduce heat of the at least one memory die.
Dependencies are inferred from the claim text.