US 2025/0040361 A1 · DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME

Abstract

A display panel includes a base layer; a transistor which includes a semiconductor pattern, a gate which overlaps the semiconductor pattern, a source and a drain connected to the semiconductor pattern; a light-emitting element; a capacitor which includes a first electrode disposed in a same layer as the semiconductor pattern and a second electrode disposed on the first electrode; an inter-insulating layer disposed between the semiconductor pattern and the gate; and an intermediate insulating layer which is disposed between the gate and the source and the drain and includes a groove which exposes the second electrode. A side surface, of the intermediate insulating layer, which defines the groove includes a first side surface which contacts the second electrode, an upper surface which overlaps a portion of the first electrode, and a second side surface spaced apart from the first side surface.

Claims20

Dependent claims

A display panel, comprising:

a base layer;
a transistor disposed on the base layer, and including a semiconductor pattern, a gate overlapping the semiconductor pattern, and a source and a drain connected to the semiconductor pattern;
a light-emitting element connected to the transistor;
a capacitor including a first electrode disposed in a same layer as the semiconductor pattern, and a second electrode disposed on the first electrode;
an inter-insulating layer disposed between the semiconductor pattern and the gate;
and
an intermediate insulating layer disposed between the gate and the source and the gate and the drain, the intermediate insulating layer including:
a side surface in which a groove which exposes the second electrode is defined, the side surface including:
a first side surface in contact with the second electrode;
an upper surface overlapping a portion of the first electrode;
and
a second side surface spaced apart from the first side surface.

9 more elements

A method for manufacturing a display panel, the method comprising:

forming a first electrode and a semiconductor pattern on a base layer;
forming an inter-insulating layer which covers the first electrode and the semiconductor pattern;
forming, on the inter-insulating layer, a second electrode overlapping the first electrode, and a gate overlapping the semiconductor pattern;
doping the first electrode which does not overlap the second electrode, and the semiconductor pattern which does not overlap the gate;
forming an intermediate insulating layer which covers the second electrode and the gate, and a photoresist layer on the intermediate insulating layer;
forming a stepped region in the photoresist layer which overlaps an end of the second electrode through a half-tone mask in which a plurality of slits is defined, and patterning the photoresist layer so that the intermediate insulating layer overlapping a portion of the second electrode is exposed;
patterning the intermediate insulating layer so that the portion of the second electrode is exposed;
removing the stepped region of the photoresist layer;
and
removing the intermediate insulating layer exposed by the photoresist layer through the removing the stepped region,
wherein the stepped region overlaps a portion, of the first electrode, which does not overlap the second electrode, and
the inter-insulating layer remains on the portion of the first electrode.

9 more elements

Dependencies are inferred from the claim text.

Display panel and method for manufacturing the same

Life of this patent

Display panel and method for manufacturing the same

Life of this patent

Abstract

Claims20