I/o circuit, semiconductor device, cell library, and circuit designing method for semiconductor device

A cell library that is read out from a circuit designing program executed on a computer and contains a plurality of types of standard cells arbitrarily combinable to form an I/O circuit of a semiconductor device, at least one of the plurality of types of standard cells comprising:

• a first element forming region configured so that a protection target element having a gate electrically connected to an external terminal is formed therein;
• a second element forming region arranged in immediate proximity to the external terminal and configured so that a first protection element for protecting the protection target element from electrostatic breakdown is formed therein;
• and
• a third element forming region arranged between the first element forming region and the second element forming region and configured so that a first transistor and a second transistor are formed therein,
• wherein
• at least one of the first transistor and the second transistor has a drain connected to a gate of the protection target element and a source, a gate, and a back gate all connected to a constant potential terminal, thus functioning as a second protection element for protecting the protection target element from electrostatic breakdown.