High voltage field effect transistors with different sidewall spacer configurations and method of making the same

A semiconductor structure, comprising:

• a first field effect transistor located in a first device region of a substrate and comprising first active regions laterally spaced from each other by a first semiconductor channel, a first gate dielectric overlying the first semiconductor channel, a first gate electrode overlying the first gate dielectric, and a first gate spacer having first laterally-straight outer sidewalls having first laterally-straight bottom edges that coincide with top edges of first laterally-straight sidewalls of the first gate dielectric;
• and
• a second field effect transistor located in a second device region of the substrate and comprising second active regions laterally spaced from each other by a second semiconductor channel, a second gate dielectric overlying the second semiconductor channel and the second active regions and including a pair of discrete gate-dielectric openings therethrough that overlie a respective one of the second active regions, a second gate electrode overlying the second gate dielectric, and a second gate spacer comprising:
• a contoured portion that overlies a portion of a top surface of the second gate electrode and that laterally surrounds the second gate electrode;
• and
• horizontally-extending portions that overlie the second active regions and including a pair of discrete gate-spacer openings therethrough that overlie the pair of discrete gate-dielectric openings.