Semiconductor device and method of manufacturing semiconductor device

A semiconductor device, comprising:

• a substrate;
• an insulating layer provided on a surface of the substrate on a side of the substrate, wherein the insulating layer is provided with a plurality of trenches extending in a first direction, the plurality of trenches are sequentially arranged in parallel in a second direction, and the first direction and the second direction are directions perpendicular to each other in a plane where the substrate is located;
• a first electrode layer and a second electrode layer sequentially provided in the first direction on a surface of the insulating layer on a side away from the substrate, wherein a spacing region is provided between the first electrode layer and the second electrode layer;
• a semiconductor layer provided on a surface of the first electrode layer on the side away from the substrate and provided on a surface of the second electrode layer on the side away from the substrate, wherein an orthographic projection of the semiconductor layer on the substrate has an overlapping region with each of an orthographic projection of the first electrode layer on the substrate, an orthographic projection of the second electrode layer on the substrate and an orthographic projection of the spacing region on the substrate, the semiconductor layer covers bottom portions and sidewalls of all channel trenches, and the channel trenches are at least a part of trench bodies of the trenches located in the spacing region;
• a gate dielectric layer provided on a surface of the semiconductor layer on a side away from the insulating layer, wherein an orthographic projection of the gate dielectric layer on the substrate has an overlapping region with the orthographic projection of the spacing region on the substrate, the orthographic projection of the gate dielectric layer on the substrate has no overlapping region with each of the orthographic projection of the first electrode layer on the substrate and the orthographic projection of the second electrode layer on the substrate, and the gate dielectric layer covers a surface of the semiconductor layer in the channel trenches on a side away from the bottom portions and the sidewalls of the channel trenches;
• and
• a gate layer provided on a surface of the gate dielectric layer on a side away from the semiconductor layer, wherein an orthographic projection of the gate layer on the substrate has an overlapping region with the orthographic projection of the spacing region on the substrate, and at least a part of the channel trenches are fully filled with the gate layer.